• Title/Summary/Keyword: delay components

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Sinusoidal Current Control of Single-Phase PWM Converters under Voltage Source Distortion Using Composite Observer (왜곡된 전원 전압하에서 Composite 관측기를 이용한단상 PWM 컨버터의 정현파 전류 제어)

  • Nguyen, Thanh Hai;Lee, Dong-Choon;Lee, Suk-Gyu
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.5
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    • pp.466-476
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    • 2011
  • In this paper, a high-performance current control for the single-phase PWM converter under distorted source voltages is proposed using a composite observer. By applying the composite observer, the fundamental and high-order harmonic components of the source voltage and current are extracted without a delay. The extracted fundamental component is used for a phase-lock loop (PLL) system to detect the phase angle of the source voltage. A multi-PR (proportional-resonant) controller is employed to regulate the single-phase line current. The high-order harmonic components of the line current are easily eliminated, resulting in the sinusoidal line current. The simulation and experimental results have verified the validity of the proposed method.

Low-power heterogeneous uncore architecture for future 3D chip-multiprocessors

  • Dorostkar, Aniseh;Asad, Arghavan;Fathy, Mahmood;Jahed-Motlagh, Mohammad Reza;Mohammadi, Farah
    • ETRI Journal
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    • v.40 no.6
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    • pp.759-773
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    • 2018
  • Uncore components such as on-chip memory systems and on-chip interconnects consume a large amount of energy in emerging embedded applications. Few studies have focused on next-generation analytical models for future chip-multiprocessors (CMPs) that simultaneously consider the impacts of the power consumption of core and uncore components. In this paper, we propose a convex-optimization approach to design heterogeneous uncore architectures for embedded CMPs. Our convex approach optimizes the number and placement of memory banks with different technologies on the memory layer. In parallel with hybrid memory architecting, optimizing the number and placement of through silicon vias as a viable solution in building three-dimensional (3D) CMPs is another important target of the proposed approach. Experimental results show that the proposed method outperforms 3D CMP designs with hybrid and traditional memory architectures in terms of both energy delay products (EDPs) and performance parameters. The proposed method improves the EDPs by an average of about 43% compared with SRAM design. In addition, it improves the throughput by about 7% compared with dynamic RAM (DRAM) design.

Multiple Decoupling Current Control Strategies for LCL Type Grid-Connected Converters Based on Complex Vectors under Low Switching Frequencies

  • Liu, Haiyuan;Shi, Yang;Guo, Yinan;Wang, Yingjie;Wang, Wenchao
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.1034-1044
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    • 2019
  • In medium-voltage and high-voltage high-power converters, the switching devices need to operate at a low switching frequency to reduce power loss and increase the power capacity. This increases the delay of the signal sampling and PWM. It also makes the cross-couplings of the d-q current components more severe. In addition, the LCL filter has three cross-coupling loops and is prone to resonance. In order to solve these problems, this paper establishes a complex vector model of an LCL type grid-connected converter. Based on this model, two multiple decoupling current control strategies with passive damping / notch damping are proposed for the LCL type grid-connected converter. The proposed strategies can effectively eliminate the cross-couplings of the converter, achieve independent control of the d-q current components, expand the stable region and suppress the resonance of the LCL filter. Simulation and experimental results verify the correctness of the theoretical analysis and the feasibility of the proposed strategies.

Studies on CFST column to steel beam joints using endplates and long bolts under central column removal

  • Gao, Shan;Yang, Bo;Guo, Lanhui;Xu, Man;Fu, Feng
    • Steel and Composite Structures
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    • v.42 no.2
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    • pp.161-172
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    • 2022
  • In this paper, four specimens of CFST column joints with endplates and long bolts are tested in the scenario of progressive collapse. Flush endplate and extended endplate are both adopted in this study. The experimental results show that increasing the thickness of the endplate could improve the behavior of the joint, but delay the mobilization of catenary action. The thickness of the endplate should not be relatively thick in comparison to the diameter of the bolts, otherwise catenary action would not be mobilized or work effectively. Effective bending deformation of the endplate could help the formation and development of catenary action in the joints. The performance of flexural action in the joint would affect the formation of catenary action in the joint. Extra middle-row bolts set at the endplates and structural components set below the bottom beam flange should be used to enhance the robustness of joints. A special weld access hole between beam and endplate should be adopted to mitigate the chain damage potential of welds. It is suggested that the structural components of joints should be independent of each other to enhance the robustness of joints. Based on the component method, a formula calculating the stiffness coefficient of preloaded long bolts was proposed whose results matched well with the experimental results.

Enhancing VANET Security: Efficient Communication and Wormhole Attack Detection using VDTN Protocol and TD3 Algorithm

  • Vamshi Krishna. K;Ganesh Reddy K
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.18 no.1
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    • pp.233-262
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    • 2024
  • Due to the rapid evolution of vehicular ad hoc networks (VANETs), effective communication and security are now essential components in providing secure and reliable vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communication. However, due to their dynamic nature and potential threats, VANETs need to have strong security mechanisms. This paper presents a novel approach to improve VANET security by combining the Vehicular Delay-Tolerant Network (VDTN) protocol with the Deep Reinforcement Learning (DRL) technique known as the Twin Delayed Deep Deterministic Policy Gradient (TD3) algorithm. A store-carry-forward method is used by the VDTN protocol to resolve the problems caused by inconsistent connectivity and disturbances in VANETs. The TD3 algorithm is employed for capturing and detecting Worm Hole Attack (WHA) behaviors in VANETs, thereby enhancing security measures. By combining these components, it is possible to create trustworthy and effective communication channels as well as successfully detect and stop rushing attacks inside the VANET. Extensive evaluations and simulations demonstrate the effectiveness of the proposed approach, enhancing both security and communication efficiency.

A Study on the Motion Analysis and Lead-Filter Design for High Speed/Accuracy Movement of Gantry Robot (갠트리 로봇의 고속/고정밀 이송을 위한 모션분석 및 앞섬필터 설계)

  • Kim, Jin-Dae;Cho, Che-Seung;Lee, Hyuk-Jin;Shin, Chan-Bai;Park, Chul-Hu
    • Journal of Institute of Control, Robotics and Systems
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    • v.17 no.1
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    • pp.31-37
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    • 2011
  • Recently gantry-type robot with 3 axes rectangular coordinates have been studied in the many industrial production equipment and machinery fields. To acquire a good handling and motion performance of this robot, reducing the settling-time and securing the accurate-transfer positioning under high-speed conditions should be required. However when robot is moved in high-speed, the large inertia of robot can lead to serious vibration of robot's head. The time-delayed control characteristics of this robot can also lead to tracking error. In this research, the analysis of the effects of higher order positional-profile is carried out to assure high-speed performance and stiffness specifications. To remove the residual vibration caused by kinematic coupling effect of dual-servo gantry, we develop a dual-servo gantry of rotary type that moving frame of x-axis rotates about z-axis. In order to decrease the tracking error, the 3 type lead-filter through system identification was applied respectively. From the experimental results, it was shown that zero-order series leader-filter has the best performance about tracking error and settling time.

Improvement of Microphone Away Performance in the Low Frequencies Using Modulation Technique (변조 기법을 이용한 마이크로폰 어레이의 저주파 대역 특성 개선)

  • Kim, Gi-Bak;Cho, Nam-Ik
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.4 s.304
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    • pp.111-118
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    • 2005
  • In this paper, we employ the modulation technique for improving the characteristics of beamformer in the low frequencies and thus improving the overall noise reduction performance. In the 1-dimensional uniform linear microphone arrays, we can suppress the narrowband noise component using the delay-and-sum beamforming. But, for the wideband noise signal, the delay-and-sum beamformer does not work well for the reduction of low frequency component because the inter-element spacing is usually set to avoid spatial aliasing at high frequencies. Hence, the beamwidth is not uniform with respect to each frequency and it is usually wider at the low frequencies. In order to obtain the beamwidth independent of frequencies, subarray systems[1][2][3][4] and multi-beamforming[5] have been proposed. However these algorithms need large space and more microphones since they are based on the theory that the size of the array is proportional to the wavelength of the input signal. In the proposed beamformer, we reduce the low frequency noise by using modulation technique that does not need additional sensors or non-uniform spacing. More Precisely, the array signals are split into subbands, and the low frequency components are shifted to high frequencies by modulation and reduced by the delay-and-sum beamforming techniques with small size microphone array. Experimental results show that the proposed technique Provides better performance than the conventional ones, especially in the low frequency band.

Linear Predictor Using Charge-Coupled Devices (CCD를 이용한 선형예측기)

  • 최태영;신철재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.12 no.1
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    • pp.9-18
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    • 1987
  • An electro-optic system using linear photosensitive Charge Coupled Devices(CCDs) having dummy pixels has been proposed for realzation of linear prodictor in the differential pulse code modulation(DPCM). The system consists of three components as conventional system:input light source, spatial filter(mask) and CCD line scanning sensor. For the delay time due to the dummy pixels in CCD, modifying conventional mask, a new dispersive mask is proposed, of which every prediction coefficient is dispersed on the more than one element, the characteristics of the system using the proposed dispersive mask are analyzed theoretically and verified with experiment.

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Improved Design Criterion for Space-Frequency Trellis Codes over MIMO-OFDM Systems

  • Liu, Shou-Yin;Chong, Jong-Wha
    • ETRI Journal
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    • v.26 no.6
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    • pp.622-634
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    • 2004
  • In this paper, we discuss the design problem and the robustness of space-frequency trellis codes (SFTCs) for multiple input multiple output, orthogonal frequency division multiplexing (MIMO-OFDM) systems. We find that the channel constructed by the consecutive subcarriers of an OFDM block is a correlated fading channel with the regular correlation function of the number and time delay of the multipaths. By introducing the first-order auto-regressive model, we decompose the correlated fading channel into two independent components: a slow fading channel and a fast fading channel. Therefore, the design problem of SFTCs is converted into the joint design in both slow fading and fast fading channels. We present an improved design criterion for SFTCs. We also show that the SFTCs designed according to our criterion are robust against the multipath time delays. Simulation results are provided to confirm our theoretic analysis.

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Grid Current Control Scheme at Thee-Phase Grid-Connected Inverter Under Unbalanced and Distorted Grid Voltage Conditions (계통전압 왜곡 및 불평형시 3상 계통연계인버터의 계통전류제어 기법)

  • Tran, Thanh-Vu;Chun, Tae-Won
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.11
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    • pp.1560-1565
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    • 2013
  • This paper proposes the control method for compensating for unbalanced grid current and reducing a total harmonic distortion (THD) of the grid current at the three-phase grid-connected inverter systems under unbalancd and distorted grid voltage conditions. The THD of the grid current caused by grid voltage harmonics is derived by considering the phase delay and magnitude attenuation due to the hardware low-pass filter (LPF). The Cauchy-Schwarz inequality theory is used in order to search more easily for a minimum point of THD. Both the gain and angle of a compensation voltage at the minimum point of THD of the grid current are derived. The negative-sequence components in the three-phase unbalanced grid voltage are cancelled in order to achieve the balanced grid current. The simulation and experimental results show the validity of the proposed control methods.