• Title/Summary/Keyword: data synchronization

Search Result 781, Processing Time 0.028 seconds

Channel Estimation Method Using Packet Synchronization Sequence for MB-OFDM System (MB-OFDM 시스템에서 Packet Synchronization Sequence를 사용한 채널추정 방식)

  • Shon Soung-Hwan;Lee Kyung-Tak;Kim Jae-Moung
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.12A
    • /
    • pp.1174-1182
    • /
    • 2005
  • This paper, we propose a new channel Estimation method for MB-OFDM(Multi-Band OFDM) system that is suggested as one of standards in IEEE 802.15 TG3a for high data rate(110Mbps${\~}$480Mbps) WPAN system. The proposed method uses correlation characteristic of the PS(Packet Synchronization) sequence for timing synchronization. It can reduce the influence of noise compared with the conventional algorithm which based on LS(Least square) algorithm is redundancy without using the CE(Channel Estimation) Sequence for channel Estimation. We simulate both conventional method and proposed method for performance analysis in S-V channel environment which proposed by IEEE 802.15.3a. Simulation results show the proposed algorithm outperforms conventional algorithm about 1${\~}$1.5dB of Eb/NO.

The Time Synchronization Signals of the GNSS Receiver for KSLV-II and Their Performance Assessment (한국형발사체 위성항법수신기의 시각동기신호 생성 및 성능 평가)

  • Kwon, Byung-Moon;Shin, Yong-Sul;Ma, Keun-Su;Yun, Kwang-Ho;Seo, Hung-Seok
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.47 no.11
    • /
    • pp.812-820
    • /
    • 2019
  • The GNSS receiver for KSLV(Korea Space Launch Vehicle)-II provides real-time navigation data as well as precise time and time interval. The precise time signals provided by the GNSS receiver that can be used for the time synchronization between onboard systems, and between the onboard systems and ground stations have the forms of the 1PPS(One Pulse Per Second) and IRIG-B(Inter-Range Instrumentation Group Time Code B) which are synchronized with UTC(Coordinated Universal Time). A signal for timing faults also informs whether the time synchronization signals are available or not. This paper describes the time synchronization signals of the GNSS receiver for KSLV-II and their performance assessment.

Algorithm for the Improvement of Time and Frequency Synchronization Performance in OFDMA System (OFDMA 시스템의 시간 및 주파수 동기 성능 향상을 위한 동기화 알고리즘)

  • Noh Jung-Ho;Sun Tae-Hyoung;Chang Kyung-Hi
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.4A
    • /
    • pp.402-411
    • /
    • 2006
  • In OFDMA system, multiple users transmit signal through the subcarriers assigned to the user. Capabilities of high data-rate transmission in OFDMA system come from the ability to compensate the ICI (Inter Carrier Interference) using a single-tap equalizer and to implement transmitter and receiver by employing high speed FFT circuitry. Issues of time and frequency synchronization in OFDM system is quite essential to preserve the orthogonality among subcarriers not to produce ICI. In this paper, we Int analyze the preamble used in 802.16 d/e and WiBro system. Then we propose an effective timing synchronization algorithm, which is more accurate than the conventional one in the sense of timing position, and integral frequency offset estimation scheme for the simultaneouse estimation of the fractional and integral frequency offset. Through the simulation utilizing the proposed synchronization algorithm and structure, we show that the performance degradation due to the adjacent channel interference can be mitigated for the than conventional ones.

High Level Design and Performance Evaluation for the Implementation of WCDMA Base Station Modem (WCDMA 기지국 모뎀의 구현을 위한 상위 레벨 설계 및 통합 성능 평가)

  • Do Joo-Hyun;Lee Young-Yong;Chung Sung-Hyun;Choi Hyung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.1A
    • /
    • pp.10-27
    • /
    • 2005
  • In this paper, we propose a high level design architecture of WCDMA(UMTS) base station modem and synchronization algorithms applied to the proposed architecture. Also analysis of each synchronization algorithm and performance evaluation of fixed point designed modem are shown. Since the target system is base station modem, each synchronization algorithm is designed for its stable operation. To minimize implementation complexity, optimum fixed point design for best operation of synchronization algorithms is performed. We performed symbol level link simulation with fixed point designed modem simulator for data rate of 12.2kbps, 64kbps, 144kbps, and 384kbps. We compared performance results to the minimum requirements specified in 3GPP TS 25.104(Release 5). Extensive computer simulation shows that the proposed modem architecture has stable operation and outperform the minimum requirement by 2 dB. The proposed modem architecture has been applied in the implementation of WCDMA reverse link receiver modem chip successfully.

Implementation of a High Speed GEM frame Synchronization Circuit in the G-PON TC Sublayer Payload (G-PON TC 계층 유료부하 내에서 고속 GEM 프레임 동기회로 구현)

  • Chung, Hae;Kwon, Young-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.34 no.5B
    • /
    • pp.469-479
    • /
    • 2009
  • The GEM frame is used a mean to deliver the variable length user data and consists of the header and the payload in the G-PON system. The HEC field of header protects contents of the header and is used to maintain GEM frame synchronization at the same time. When an LCDG (Loss of GEM Channel Delineation) occurs while receiving frames, the receiver have to discard corrupted frames until acquiring the synchronization again. Accordingly, high-speed synchronization method is required to minimize the frame loss. In this paper, we suggest not only a main state machine but a sub-state machine to reduce the frame loss when undetectable errors occurred in the GEM header. Also, we provide a more efficient and fast parallel structure to detect the starting point of the header. Finally, the proposed method is implemented with the FPGA and verified by the logic analyzer.

Method of Master Receiver Selection Using DOP for Time Synchronization in TDOA-Based Localization (TDOA 기반 위치탐지를 위한 DOP을 이용한 시각동기화 주수신기 선택 기법)

  • Kim, Sanhae;Song, Kyuha;Kwak, Hyungyu
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.41 no.9
    • /
    • pp.1069-1080
    • /
    • 2016
  • TDOA(Time Difference Of Arrival)-based localization system such as the passive surveillance system performs the time synchronization between the receivers after separated installing multiple receivers to set the same clock for all receivers. And it estimates 2D(or 3D) location of the target by solving intersection of the multiple hyperbola(or hyperboloid) using TDOA. To perform time synchronization, one receiver must be set to the master, and it provide the reference data to compensate the clock of the rest of the slaves. The positioning accuracy of TDOA-based localization system is changed in accordance with the master that is selected among multiple receivers. So, the optimum receiver which is selected among multiple receivers must be set to master to get best performance in the considered deployment of receivers. In this paper, we propose a selection scheme of master receiver for time synchronization using DOP(Dilution Of Precision) which is based on location of the target and the multiple receivers. The proposed scheme has low complexity and short processing time, and it is easy to automate in the TDOA-based localization systems.

Design and Implementation of Multimedia Authoring System using Temporal/Spatial Synchronization Manager (시공간 동기화 관리기를 이용한 멀티미디어 저작 시스템의 설계 및 구현)

  • Yeu, In-Kook;Hwang, Dae-Hoon
    • The Transactions of the Korea Information Processing Society
    • /
    • v.4 no.11
    • /
    • pp.2679-2689
    • /
    • 1997
  • In this paper, a multimedia authoring system using temporal/spatial synchronization manager is designed and implemented to support easy and efficient generation of multimedia title. For this goal, a flowchart-oriented logic generator which represents a title author's design intent into a practical title composition logic without extra translation process, and a logic interpreter which translate and implement the generated title logic, are designed. Furthermore, a temporal/spatial synchronization manager which manages temporal/spatial synchronization information between media data for multimedia representation, is designed. Especially, a temporal specification model and MRL, a formal language for the model, are designed to synchronize the temporal relation between media objects. The MRL represents a complex temporal relation by simple and clear form, and synchronizes efficiently multimedia representation according to the author's intent. A presentation frame editor which makes coincidence between visible size of representation media and attachment point, is implemented for spatial synchronization.

  • PDF

A Non-Periodic Synchronization Algorithm using Address Field of Point-to-Point Protocol in CDMA Mobile Network (CDMA이동망에서 점대점 프로토콜의 주소영역을 이용한 비주기적 동기 알고리즘)

  • Hong, Jin-Geun;Yun, Jeong-O;Yun, Jang-Heung;Hwang, Chan-Sik
    • Journal of KIISE:Computer Systems and Theory
    • /
    • v.26 no.8
    • /
    • pp.918-929
    • /
    • 1999
  • 동기식 스트림 암호통신 방식을 사용하는 암호통신에서는 암/복호화 과정 수행시 암호통신 과정에서 발생하는 사이클슬립으로 인해 키수열의 동기이탈 현상이 발생되고 이로 인해 오복호된 데이타를 얻게된다. 이러한 위험성을 감소하기 위한 방안으로 현재까지 암호문에 동기신호와 세션키를 주기적으로 삽입하여 동기를 이루는 주기적인 동기암호 통신방식을 사용하여 왔다. 본 논문에서는 CDMA(Cellular Division Multiple Access) 이동망에서 데이타서비스를 제공할 때 사용되는 점대점 프로토콜의 주소영역의 특성을 이용하여 단위 측정시간 동안 측정된 주소비트 정보와 플래그 패턴의 수신률을 이용하여 문턱 값보다 작은경우 동기신호와 세션키를 전송하는 비주기적인 동기방식을 사용하므로써 종래의 주기적인 동기방식으로 인한 전송효율성 저하와 주기적인 상이한 세션키 발생 및 다음 주기까지의 동기이탈 상태의 지속으로 인한 오류확산 등의 단점을 해결하였다. 제안된 알고리즘을 링크계층의 점대점 프로토콜(Point to Point Protocol)을 사용하는 CDMA 이동망에서 동기식 스트림 암호 통신방식에 적용시 동기이탈율 10-7의 환경에서 주기가 1sec인 주기적인 동기방식에서 요구되는 6.45x107비트에 비해 3.84x105비트가 소요됨으로써 전송율측면에서의 성능향상과 오복호율과 오복호 데이타 비트측면에서 성능향상을 얻었다. Abstract In the cipher system using the synchronous stream cipher system, encryption / decryption cause the synchronization loss (of key arrangement) by cycle slip, then it makes incorrect decrypted data. To lessen the risk, we have used a periodic synchronous cipher system which achieve synchronization at fixed timesteps by inserting synchronization signal and session key. In this paper, we solved the problem(fault) like the transfer efficiency drops by a periodic synchronous method, the periodic generations of different session key, and the incorrectness increases by continuing synchronization loss in next time step. They are achieved by the transfer of a non-periodic synchronous signal which carries synchronous signal and session key when it is less than the threshold value, analyzing the address field of point-to-point protocol, using the receiving rate of address bits information and flag patterns in the decision duration, in providing data services by CDMA mobile network. When the proposed algorithm is applied to the synchronous stream cipher system using point-to-point protocol, which is used data link level in CDMA mobile network, it has advanced the result in Rerror and Derror and in transmission rate, by the use of 3.84$\times$105bits, not 6.45$\times$107bits required in periodic synchronous method, having lsec time step, in slip rate 10-7.

A Matched Filter with Two Data Flow Paths for Searching Sychronization in DSSS (DSSS 동기탐색을 위한 이중 데이터 흐름 경로를 갖는 정합필터)

  • Song Myong-Lyol
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.1A
    • /
    • pp.99-106
    • /
    • 2004
  • In this Paper, the matched filter for searching initial synchronization in DSSS (direct sequence spread spectrum) receiver is studied. The matched filter with a single data flow path is described which can be presented by HDL (Hardware Description Language). In order to improve the processing time of operations for the filter, equations are arranged to represent two data flow paths and the associated hardware model is proposed. The model has an architecture based on parallelism and pipeline for fast processing, in which two data flow paths with a series of memory, multiplier and accumulator are placed in parallel. The performance of the model is analyzed and compared with the matched filter with a single data flow path.

Study on Massive Mobile Mapping Data Management Systems using Exif Tags and Data Synchronizations (Exif 태그 및 자료 동기화를 이용한 대용량 모바일 매핑 자료 관리체계 연구)

  • Woo, Hee-Sook;Kwon, Kwang-Seok;Ahn, Ki-Seok
    • Spatial Information Research
    • /
    • v.17 no.1
    • /
    • pp.67-77
    • /
    • 2009
  • Mobile mapping systems with CCD cameras, GPS and IMU etc. can acquire massive photos and geographic informations along by roads. But it is easy to involve many errors or omissions of images and informations about roads and facilities with various files. And there were contained any conflicts or non-consistencies in massive mobile mapping data which were acquired by multiple survey teams in various survey regions. As an image tag standard, Exif helps us to encapsulate the precise GPS times and essential informations in the header of JPEG files and uses with the identification code for consistent managements of massive mobile mapping data in this paper. And Systematic management systems with data synchronization technology manage more consistently massive photos and their information.

  • PDF