• Journal of IKEEE
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• v.12 no.4
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• pp.211-216
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• 2008

This paper proposes an 8${\times}$8 bit parallel multiplier using MOS current-mode logic (MCML) circuit for low power consumption. The proposed circuit has a structure of low-power MOS current-mode logic circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to PMOS transistor to minimize the leakage current. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/50. The designed multiplier is achieved to reduce the power consumption by 10.5% and the power-delay-product by 11.6% compared with the conventional MOS current-model logic circuit. This circuit is designed with Samsung 0.35 ${\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.10
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• pp.3905-3910
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• 2010

In this paper, a 3rd-order Chebyshev current-mode filter in 1.8V-$0.18{\mu}m$ CMOS parameter is designed. The core circuit of the current-mode filter is composed with the proposed voltage-controlled frequency tunable current-mode integrator. Using the proposed current-mode integrator, the cutoff frequency of the filter can be controlled and also total power consumption can be reduced. HSPICE simulation results show the cutoff frequency of the filter is controlled between 1.2MHz and 10.1MHz, and the power consumption is 2.85mW at Vdd=1.8V.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.1
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• pp.20-26
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• 2009

In this paper, the switching mode conversion type pulse charger by fly-back converter method for lead battery of the solar cell generator equipment is proposed. And we propose the control circuit and design method of insulated switching mode convert type pulse charger by fly-back convert method in the lead battery. The proposed system can minimize the current consumption by digital pulse. Also the proposed system can generate the constant 10[KHz] frequency, transmit the signal with main control system in the power control system. And it supervises the state of lead battery using one chip micro processor. The proposed the switching mode conversion type pulse charger by the fly-back converter method can charge fast and stabilize lead battery with nominal value 12[V], 20[AH]. Also we propose the design procedure of the power control circuit for turn ratio of fly-back inductor and determining method of values such as the charging current, bulk current, partial current, over current value and fixed charging voltage. The experiment results for the voltage and current wave for partial, bulk, over and fixed charging period show the good charging effect and performance. And the PCB and internal coupling diagram of the switching mode conversion type pulse charger by fly-back converter method is presented.

• Journal of the Korean Vacuum Society
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• v.5 no.1
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• pp.85-92
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• 1996

The external electricla characteristics of helicon wave plasmas were measured over a wide range of RF power and magnetic filed. External parameters. such as antenna voltage , current, phase shift, and interanl parameter, electron density were measured at 7MHz, 1mTorr Ar discharge . The equivalent discharge resistance and reactance, and the power transfer efficiency were calculated through these measurements. There are a helicon mode which produces high density plasma by helicon wave and a lowmode which produces low density plasma by capaictive electric field. In case of the helicon mode, the anternna voltage and current were lower than those of the low-mode. The phase difference between voltage and current decreased suddenly at the transition point from the low-mode to the helicon mode. Equivalent resistance and power efficiency increased and reactance decreased suddenly at the transition point. These results mean that the power transperred to plasma and the nutual coupling between the antenna and plasma increase as the mode changes from the low-mode to the helicon mode.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1593-1599
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• 2017

This paper presents a multi-channel light-emitting diode (LED) driver IC with a current-mode current regulator. The proposed current regulator replaces resistors for current sensing with a sequentially controlled single current sensor and a single regulation loop for sensing and regulating all LED channel currents. This minimizes the current mismatch among the LED channels and increases voltage headroom or, equivalently, power efficiency. The proposed LED driver IC was fabricated in a $0.35-{\mu}m$ BCD 60-V high voltage process, and the chip area is $1.06mm^2$. The measured maximum power efficiency is 93.4 % from a 12-V input, and the inter-channel current error is smaller than as low as ${\pm}1.3%$ in overall operating region.

• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.1-6
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• 2012

Using a current-mode multiple reset, a current-to-voltage(I-V) converter with a wide dynamic range was produced. The converter consists of a trans-impedance amplifier(TIA), an analog-to-digital converter(ADC), and an N-bit counter. The digital output of the I-V converter is composed of higher N bits and lower bits, obtained from the N-bit counter and the ADC, respectively. For an input current that has departed from the linear region of the TIA, the counter increases its digital output, this determines a reset current which is subtracted from the input current of the I-V converter. This current-mode reset is repeated until the input current of the TIA lies in the linear region. This I-V converter is realized using 0.35 ${\mu}m$ LSI technology. It is shown that the proposed I-V converter can increase the maximum input current by a factor of $2^N$ and widen the dynamic range by $6^N$. Additionally, the I-V converter is successfully applied to a photometric sensor.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.7
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• pp.659-664
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• 2016

In this paper, we suggest operational trans-conductance amplifier(OTA) for current-mode FIR filter that can be used in a digital circuit system requiring high operating frequency and low power consumption. The current-mode signal processing is one of the very innovative design method for a low power consumption system with high operating frequency because it shows a constant power regardless of frequency. From the simulation result using 0.35um CMOS process, when Vdd is 2V, it is confirmed that the proposed circuit showed the dynamic range of the about 1V, about 50% of supply voltage and output current swing of about 0~200uA. Also, the power consumption was evaluated with about 21uW and the active size for an integration was measured with $71um{\times}166um$.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2682-2684
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• 1999

This paper presents design and stability analysis of the constant frequency Flyback type converter using average current-mode control. The average current-mode control has been recently reported, and superior characteristics over a peak current-mode control such as a good tracking performance of an average current, no slope compensation and noise immunity. By the improvement of PM(Phase Margin) obt from applying the compensator in the current loop, the stability of designed flyback convert more improved. The validity of designed convert confirmed by simulation and experimental result

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.267-270
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• 2003

This paper proposes high performance $8{\times}8$ multiplier using current-mode quaternary logic technique. The multiplier is functionally partitioned into the following major sections: partial product generator block(binary-quaternary logic conversion), current-mode quaternary logic full-adder block, quaternary-binary logic conversion block. The proposed multiplier has 4.5ns of propagation delay and 6.1mW of power consumption. Also, this multiplier can easily adapted to binary system by the encoder, the decoder. This circuit is simulated under 0.35um standard CMOS technology, 5uA unit current, and 3.3V supply voltage using Hspice.

• Journal of Power Electronics
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• v.15 no.3
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• pp.712-720
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• 2015

A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± V_dc/6, whereas the common-mode voltages of the conventional MPCC method vary within ± V_dc/2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.