• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.860-863
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• 2003

In this paper high power SMU(Source Measurement Unit) having 50V/1.5A source/measure range has been designed and implemented. The SMU has two operation mode, voltage mode and current mode. The SMU can be used as variable voltage source, variable current source, voltage meter, or current meter. Combining two different unit, output power can be doubled as 100V/1.5A. The developed SMU tan be used many semiconductor testing system and electronic device inspecting system.

• ETRI Journal
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• 제24권6호
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• pp.429-434
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• 2002

This paper investigates the effect of a corrugated aperture on a common-mode current traveling along a penetrating wire. Computational results illustrate that the corrugated aperture acts as a filter, significantly reducing the common-mode current on the wire. This effect causes a reduction of radiated emission from cables passing through apertures on shielding enclosures. To predict and analyze the characteristics of the common-mode current on a straight wire passing through a corrugated aperture with cylindrical symmetry, the finite-difference time-domain (FDTD) method is applied.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.921-926
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• 2003

This paper describes a new type of the spatial filter detector (SFD) with variable and multi-valued weighting function. This SFD called variable spatial filter detector with multi-valued weighting function (VSFDwMWF) uses current-mode circuits for noise resistance and high-resolution weighting values. Total weighting values consist of 7bit, 6-signal bit and 1-sign bit. We fabricate VSFDwMWF chip using Rohm 0.35${\mu}$m CMOS process. VSFDwMWF chip includes two-dimensional 10${\times}$13 photodiode array and current-mode weighting control circuit. Simulation shows the weighting values are varied and multi-valued by external switching operation. The layout of VSFDwMWF chip is shown.

• 대한전기학회논문지
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• 제41권4호
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• pp.369-378
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• 1992

This paper proposes a utility parallel processing inverter system, which consists of a voltage source PWM inverter, isolation transformer and a reactor linking the inverter to utility line. This system realizes following functions : (1) voltage phase frequency and amplitude synchronization between inverter and utility line at stand-alone mode. (2) current phase synchronization between inverter and load at parallel mode. Therefore, despite sudden increase in load current over setting point at stand-alone mode, inverter system can be transferred into parallel mode immediately without transient current. Furthermore, high frequency(18KHz) PWM control and sinusoidal filtering improve the inverter output waveform by eliminating high order harmonic components as well as low order. As a switching device, IGBT is used for high frequency switching and large current capacity.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.747-750
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• 2002

A circuit building block for realizing a continuous-time active-only current-mode integrator is presented. The proposed integrator is composed only of internally compensated type operational amplifier (OA) and operational transconductance amplifiers (OTAs). The integrator is suitable for integrated circuit implementation in either bipolar or CMOS technologies, since it does not require any external passive elements. Moreover, the integrator gain can be tuned through the transconductance gains of the OTAs. Some application examples in the realization of current-mode network functions using the proposed current-mode integrator as an active element are also given.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.200-203
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• 2002

This paper presents Continuous-current mode of $S^4$-PFC(Single-Stage Single-switch Power Factor Correction) converter. Proposed converter operates in the continueous current mode(CCM) at full load and discontinuous current mode(DCM) at light load. So, characteristic of proposed converter is no bus voltage stress and Zero Voltage Switching(ZVS) using resonant auxiliary circuit. And. This paper presents characteristic of $S^4$-PFC converter and effect of circuit parameter of proposed converter through the input inductor, PFC capacitor's variation. All of these theory and characteristic verified through the experiment with a 72W(12V, 6A), $90^{kHz}$ prototype converter.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.473-473
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• 2000

This paper presents the 2-bit parallel algorithmic ADC using current mode for parallel method algorithm. It is operated by parallel conversion, 2-bit at each moment, and increase bit numbers by serial connection. The circuit operates in current mode. The comparison ratio can be controlled while working under mode operation. The circuit design used 0.8 ${\mu}{\textrm}{m}$ CMOS technology which capable to convert 2-bit in 50 ns, power consumed 0.786 nW, with input current 0-50 mA from 3V single supply. From simulation testing, the conversion rate is much faster than other method.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.257-260
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• 2005

Three different current-mode control schemes, peak current-mode control, charge control, and average current-mode control, are investigated for applications to asymmetrical half-bridge dc-to-dc converters. The principles, implementation, and performance of the three control schemes are compared in an attempt to identify the irrespective merits and limitations. Design examples for feedback compensations are given for the three control schemes. A 50 W experimental asymmetrical half-bridge dc-to-dc converter was used to experimentally verify the theoretical results of the paper.

• 전자공학회논문지C
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• 제34C권6호
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• pp.58-70
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• 1997

In this paper, an 8bit CMOS low power, high-speed current-mode folding and interpolation A/D converter is designed with te LG semicon $0.8\mu\textrm{m}$ N-well single-poly/double-metal CMOS process to be integrated into a portable image signal processing system such as a digital camcoder. For good linearity and low power consumption, folding amplifiers and for high speed performance of the A/D converter, analog circuitries including folding block, current-mode interpolation circuit and current comparator are designed as a differential-mode. The fabricated 8 bit A/D converter occupies the active chip area of TEX>$2.2mm \times 1.6mm$ and shows DNL of $\pm0.2LSB$, INL of <$\pm0.5LSB$, conversion rate of 40M samples/s, and the measured maximum power dissipation of 33.6mW at single +5V supply voltage.

• 한국조명전기설비학회지:조명전기설비
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• 제8권3호
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• pp.36-43
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• 1994

본 연구는 교류전원측에서 콘버터에 의해 출력전압조정과 동시에 입력전류가 전압과 동상에 가까운 정현파가 되도록 하기 위해 고주파 스위칭에 의한 단상 부스터 콘버터의 제어방식을 분석하고 가변밴드폭 제어방식에 의해 1[kW]부하에 대하여 각 파라메타를 산정하며 실험장치를 구성하여 주파수 스팩트럼 분석기에 의한 분석을 토대로 고역률 동작을 확인하고자 한다.