• Industrial Engineering and Management Systems
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• 제8권4호
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• pp.239-246
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• 2009

This paper deals with the makespan minimization problem of job shops. The problem is known as one of hard problems to optimize, and therefore, many heuristic methods have been proposed by many researchers. The aim of this study is also to propose a heuristic scheduling method for the problem. However, the difference between the proposed method and many other heuristics is that the proposed method is based on depth-first branch and bound, and thus it is possible to find an optimal solution at least in principle. To accelerate the search, when a node is judged hopeless in the search tree, the proposed flexible branch and bound method can indicate a higher backtracking node. The unexplored nodes are stored and may be explored later to realize the strict optimization. Two methods are proposed to generate the backtracking point based on the critical path of the current best feasible schedule, and the minimum lower bound for the makespan in the unexplored sub-problems. Schedules are generated based on Giffler and Thompson's active schedule generation algorithm. Acceleration of the search by the flexible branch and bound is confirmed by numerical experiment.

• Journal of information and communication convergence engineering
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• 제13권3호
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• pp.172-179
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• 2015

Face-to-face (F2F) bonding in three-dimensional integrated circuits (3D ICs), compared with other bonding styles, is closer to commercialization because of its benefits in terms of density, yield, and cost. However, despite the benefits that F2F bonding expect to provide, it's physical nature has not been studied thoroughly. In this study, we, for the first time, extract cross-die (inter-die) parasitic elements from F2F bonds on the full-chip scale and compare them with the intra-die elements. This allows us to demonstrate the significant impact of field sharing across dies in F2F bonding on full-chip noise and critical path delay values. The baseline method used is the die-by-die method, where the parasitic elements of individual dies are extracted separately and the cross-die parasitic elements are ignored. Compared with this inaccurate method, which was the only method available until now, our first-of-its-kind holistic method corrects the delay error by 25.48% and the noise error by 175%.

• Architectural research
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• 제4권1호
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• pp.53-61
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• 2002

The typical Critical Path Method (CPM) leaves it to the construction managers to overcome two problems in developing networks. First, the construction manager needs to prepare information on the type of activities and their precedence relations in order to develop a network schedule. Second, he or she can include space information into the network schedule such as the locations where the activities take place, only with difficulty. These two problems make it difficult for an inexperienced person to create a network. The purpose of this paper is to provide construction managers with set equations of creating a network schedule for multiunit projects. A space-resource combined network creation are presented in this paper, which includes equations for generating a list of required activities, their precedence relations, and information on their location. Information on the space (location) and the resource is the required data for this method. Based on this information, this method divides a project into a number of activities so that each activity contains the information on the location where the activity takes place and the principal resource required for that activity. Precedence relations are then obtained from the sequence of space and resource. This method has the potential to reduce human efforts in scheduling activities.

• 대한전자공학회논문지SD
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• 제44권7호통권361호
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• pp.81-89
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• 2007

비터비 복호기는 디지털 통신 시스템에서 순방향 오류 정정을 위해서 사용하는 핵심적인 부분으로 최우 추정 복호 방식의 알고리즘을 사용한다. 비터비 복호기는 복호기 상태의 개수만큼의 경로를 계산하고 역 추적하는 특성 때문에 저 전력화가 상당히 어렵다. 본 논문에서는 기존의 SPEC-T 알고리즘을 구현하는데 있어서 비교기의 동작을 최소화할 수 있는 효율적인 방법을 제안하고 ACS(Add-Compare-Select) 구조와 MPMS(Minimum Path Metric Search) 구조에 이를 적용하였다. 실험 결과, 제안한 ACS 구조와 MPMS 구조는 기존의 구조보다 전력 소모량이 임계 값 26에서 각각 최대 약 10.7%와 11.5% 감소하였고 SPEC-T 구조보다는 전력 소모량이 임계 값 26에서 각각 약 6%와 1.5% 더 감소하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.1125-1128
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• 1998

A new architecture for high-speed implementation of adaptive decision-feedback equalizer (ADFE) applicable to wide-band digital wireless modems is described. Rather than using conventional two's complement arithmetic, a novel complex-valued filter structure is devised, which is based on redundant binary (RB) arithmetic. The proposed RB complex-valued filter reduces the critical path delay of ADFE, as well as leads to a more compact implementation than conventional methods. Also, the carry-propagation free (CPF) operation of the RB arithmetic enhances its speed. To demonstrate the proposed method, a prototype chip set is designed. They are designed to contain two complexvalued filter taps along with their coefficient updating circuits, and can be cascaded to implement loger filter taps for high bit-rate applications.

• 시멘트
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• 통권37호
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• pp.4-11
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• 1970

최근 급속히 팽창된 산업 구조와 이에 따른 업무량의 증가는 종래의 관리기술로서는 이를 성공적으로 처리할 수 없게 되었으며 아울러 인간의 미래조작능력의 증대와 기업구상력의 개발, 사회변동에 대비한 예측적인 계획의 수립 등 관리기능의 신장은 새로운 관리기법을 요구하게 되었으므로 PERT/CPM 수법이 신관리기법의 하나로 등장하게 되었다. PERT/CPM 이란 Program Evaluation Review and Technique, Critical Path Method 의 약자로서 우리말로는 계획수립 집행 및 평가로 번역되는데 이의 직역은 종속 및 총합 $\ulcorner$시스템$\lrcorner$ 과업의 동시진행 및 집중관리라 할 수 있는 것으로 시간과 비용을 절감하려는 기법인 것이다. 또한 PERT 기법은 복잡한 작업형태를 상호관련성있는 Network로 구성하고 제종속작업을 하나의 통일된 목표로 진행시키는 것을 의미한다. 이와 같은 PERT/CPM 기법은 제한된 자원의 효율적인 투자 및 관리와 불필요한 시간과 비용을 제거하여 준다. 현재 정부(경제기획원)는 PERT/CPM 제도를 도입하여 건설공사에 대한 예산관리제도를 설정중에 있으며 민간 및 정부투자기관으로서 현대건설주식회사와 한국전력주식회사와 이미 PERT/CPM 제도화방책을 연구기관에 위촉하여 제2단계적용을 시도하고 있는 것은 시대적 당위성에 따른 타당한 전망이라 하겠다. 거금 한국양회공업협회가 본제도의 도입 적용을 추진하기 위한 일련의 조사활동을 시작한 것은 시멘트 공업계의 새로운 경영관리체제를 모색하고 업계를 선도하는 중요한 전환점이 되리라 믿는다.

• 전력전자학회논문지
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• 제21권3호
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• pp.207-214
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• 2016

Magnetic circuit is a physical modeling method that is useful in designing and analyzing power transformers, especially for a priori evaluation of leakage and magnetizing inductance before actual production. In this study, a novel modeling approach that uses PSIM magnetic elements adopting gyrator and permeance-capacitances is investigated. A formula to determine the permeance-capacitors in the core and leakage path are established, and a simulation jig is devised to link the physical model and the electrical terminal characteristics with an automated parameter determination process. The derived formula is verified by measurement results of the prototype transformer samples. Given its accuracy and simplicity, this approach is suitable for analyzing and designing LLC resonant transformers whose leakage and magnetizing inductance are very critical to circuit operation.

• 한국경영과학회지
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• 제21권1호
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• pp.147-161
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• 1996

Generally the Multiprocessor Scheduling (MPS) problem is difficult to solve because of the precedence of the tasks, and it takes a lot of time to obtain its optimal solution. Though Genetic Algorithm (GA) does not guarantee the optimal solution, it is practical and effective to solve the MPS problem in a reasonable time. The algorithm developed in this research consists of a improved GA and GP/MISF (Critical Path/Most Immediate Successors First). An efficient genetic operator is derived to make GA more efficient. It runs parallel CP/MISF with GA to complement the faults of GA. The solution by the developed algorithm is compared with that of CP/MISF, and the better is taken as a final solution. As a result of comparative analysis by using numerical examples, although this algorithm does not guarantee the optimal solution, it can obtain an approximate solution that is much closer to the optimal solution than the existing GA's.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 1995년도 추계학술대회발표논문집; 서울대학교, 서울; 30 Sep. 1995
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• pp.220-229
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• 1995

Generally the Multiprocessor Scheduling(MPS) problem is difficult to solve because of the precedence of the tasks, and it takes a lot of time to obtain its optimal solution. Though Genetic Algorithm(GA) does not guarantee the optimal solution, it is practical and effective to solve the MPS problem in a reasonable time. The algorithm developed in this research consists of a improved GA and CP/MISF(Critical Path/Most Immediate Successors First). A new genetic operator is derived to make GA more efficient. It runs parallel CP/MISF with Ga to complement the faults of GA. The solution by the developed algorithm is compared with that of CP/MISF, and the better is taken as a final solution. As a result of comparative analysis by using numerical examples, although this algorithm does not guarantee the optimal solution, it can obtain an approximate solution that is much closer to the optimal solution than the existing GA's.

• 전자공학회논문지A
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• 제33A권5호
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• pp.180-187
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• 1996

This paper describes a post-layout simulation method using VHDL and C for verifying the architecture of antifuse-based FPGAs and the dedicated CAD system. An antifuse-based FPGA consists of programming circuitry including decoding logic, logic modules, segmented tracks, antifuses and I/O pads. The VHDL model which includes all these elements is used for logic verification and programming verification of the implemented circuit by reconstructing the logic circuit from the bit-stream generated from layout tool. The implemented circuit comprises of logic modules and routing networks. Since the routing delay of the complex networks is comparable to the delay of the logic module in the FPGA, the accurate post-layout simulation is essential to the FPGA system. In this paper, the C program calculates the delay of the routing netowrks using SPICE, elmore or horowitz delay models and the results feedback to the VHDL simulation. Critical path anc be found from this post-layout simulation results.