• Journal of KIISE:Software and Applications
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• v.33 no.4
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• pp.411-417
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• 2006

Motion Estimation (ME) is an important part of video coding process and it takes the largest amount of computation in video compression. Half-pixel and quarter-pixel motion estimation can improve the video compression rate at the cost of higher computational complexity In this paper, we suggest a new efficient low-complexity algorithm for half-pixel and quarter pixel motion estimation. It is based on the experimental results that the sum of absolute differences(SAD) shows parabolic shape and thus can be approximated by using interpolation techniques. The sub-pixel motion vector is searched from the minimum SAD integer-pixel motion vector. The sub-pixel search direction is determined toward the neighboring pixel with the lowest SAD among 8 neighbors. Experimental results show that more than 20% reduction in computation time can be achieved without affecting the quality of video.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.12
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• pp.1337-1344
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• 2014

The objective of an echo canceller connected to any end of a communication line such as digital subscriber line (DSL) is to compensate the outgoing transmit signal in the receiving path that the hybrid circuit leaks. The echo canceller working in a full duplex environment is an adaptive system driven by the local signal. Conventional echo canceller that implement the least mean square (LMS) algorithm provides a low computational burden but poor convergence properties. The length of the echo canceller will directly affect both the degree of performance and the convergence speed of the adaptation process. To cancel long time-varying echoes, the number of tap coefficients of a conventional echo canceller must be large, which decreases the convergence speed of the adaptive filter. This paper proposes an alternative technique for the echo cancellation in a telecommunication channel. The new technique employs the bi-directional least mean square (LMS) algorithm for adaptively computing the optimal set of the coefficients of the echo canceller, which is composed of weighted combination of both feedforward and feedback algorithms. Finally, Simulation results as well as mathematical analysis demonstrates that the proposed echo canceller has faster convergence speed than the conventional LMS echo canceller with nearly equivalent complexity of computation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.1
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• pp.30-37
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• 2011

In this paper, we propose a fast ICI suppression algorithm with adaptive channel estimation for the LTE-Advanced uplink system. In order to effectively remove phase noise and carrier frequency offset at time varying channel, we use the comb type pilot. The purpose is to improve performance by reducing computational complexity than conventional PNFS(Phase Noise & Frequency offset Suppression) algorithm. We reduce computational complexity by decreasing overlapping computation or unnecessary computation at conventional PNFS algorithm. Also, we propose an effective channel estimation method. We estimate and compensate multipath channel through the proposed adaptive channel estimation method. The BER performance of the proposed method is better about 0.5 dB than the conventional method at the Vehicular A channel.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.1028-1035
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• 2005

OFDM system has high PAPR(Peak-to-Average-Power Ratio) problem. In this paper, we present a low complexity phase weighting method to reduce the computational quantity so that we can cut down the processing time of SPW method. Proposed method is derived from the DFT property of periodical sequences by which PAPR can be reduced efficiently. The simulation results show the same PAPR reduction efficiency of proposed method in comparison with conventional methods. It can reduce 2.15 dB of PAPR with two phase factors and 3.95 dB of PAPR with four phase factors. The computation analysis shows significant improvement in the low complexity phase weighting method.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.9
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• pp.983-989
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• 2014

In this paper, a new active noise control method was proposed to decrease a weight of car, and to increase a fuel efficiency and to provide passengers' comfort and calmness, instead of a passive noise control method such as sound absorbing and insulating materials. The proposed method is an enhanced active noise controller operating by a bidirectional control algorithm. The algorithm is simple to implement and available to analyze mathematically with nearly equivalent complexity of computation. Through simulations for engine noises of a car, the proposed controller was verified that its performances of time and frequency domain were superior to those of both feedforward and feedback controllers, and it had better capability of controlling the noises when the impulsive disturbance was flow in and the response of secondary path was varied.

• Journal of Korean Society for Geospatial Information Science
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• v.16 no.4
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• pp.41-48
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• 2008

Currently used 3D models, which are mostly focused on visualization of 3D objects and lack topological structure, have limitation in being used for 3D spatial analyses and applications. However, implementing a full topology for the indoor spatial objects is less practical due to the increase of complexity and computation time. This study suggests an alternative method to build a 3D indoor model with less complexity using a spatial DBMS. Storing spatial and nonspatial information of indoor spaces in DB tables enables faster queries, computation and analyses. Also it is possible to display them in 2D or 3D using the queried information. This study suggests a 2D-3D hybrid data model, which combines the 2D topology constructed from CAD floor plans and stored in a spatial DBMS and the 3D visualization functionality. This study showed the process to build the proposed model in a spatial DBMS and use spatial functions and queries to visualize in 2D and 3D. And, then, as an example application, it illustrated the process to build an indoor evacuation simulator.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.2 s.302
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• pp.151-160
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• 2005

In this paper, we propose a new fast motion estimation algorithm based on successive elimination algorithm (SEA) which can dramatically reduce heavy complexity of the variable block size motion estimation in H.264 encoder. The proposed method applies the conventional SEA in the hierarchical manner to the seven block modes. That is, the proposed algorithm can remove the unnecessary computation of SAD by means of the process that the previous minimum SAD is compared to a current SAD for each mode which is obtained by accumulating sum norms or SAD of $4\times4$ blocks. As a result, we have tighter bound in the inequality between SAD and sum norm than in the ordinary SEA. If the basic size of the block is smaller than $4\times4$, the bound will become tighter but it also causes to increase computational complexity, specifically addition operations for sum norm. Compared with fast full search algorithm of JM of H.264, our algorithm saves 60 to $70\%$ of computation on average for several image sequences.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.75-81
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• 2015

This paper proposed the new eight-parallel MDC FFT processor using the eight-parallel MDC architecture and the efficient scheduling scheme. The proposed FFT processor supports the 256-point FFT based on the modified radix-$2^6$ FFT algorithm. The proposed scheduling scheme can reduce the number of complex multipliers from eight to six without increasing delay buffers and computation cycles. Moreover, the proposed FFT processor can be used in OFDM systems required high throughput and low hardware complexity. The proposed FFT processor has been designed and implemented with a 90nm CMOS technology. The experimental result shows that the area of the proposed FFT processor is $0.27mm^2$. Furthermore, the proposed eight-parallel MDC FFT processor can achieve the throughput rate up to 2.7 GSample/s at 388MHz.

• Journal of IKEEE
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• v.24 no.3
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• pp.783-790
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• 2020

In this paper, the human detecting radar system for indoor security applications is proposed, and its FPGA-based implementation results are presented. In order to minimize the complexity and memory requirements of the computation, the top half of the spectrogram was used to extract features, excluding the feature extraction techniques that require complex computation, feature extraction techniques were proposed considering classification performance and complexity. In addition, memory requirements were minimized by designing a pipeline structure without storing the entire spectrogram. Experiments on human, dog and robot cleaners were conducted for classification, and 96.2% accuracy performance was confirmed. The proposed system was implemented using Verilog-HDL, and we confirmed that a low-area design using 1140 logics and 6.5 Kb of memory was possible.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.3
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• pp.74-79
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• 2008

In an H.264/AVC video encoder, the motion estimation at fractional pixel accuracy improves a coding efficiency and image quality. However, it requires additional computation overheads for fractional search and interpolation, and thus, reducing the computation complexity of fractional search becomes more important. This paper proposes fast fractional search algorithms by combining the SASR(Simplified Adaptive Search Range) and the MSDSP(Mixed Small Diamond Search Pattern) with the predicted fractional motion vector. Compared with the full search and the prediction-based directional fractional pixel search, the proposed algorithms can reduce up to 93.2% and 81% of fractional search points, respectively with the maximum PSNR lost less than 0.04dB. Therefore, the proposed fast search algorithms are quite suitable for mobile applications requiring low power and complexity.