• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.10a
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• pp.177-177
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• 2003

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.11
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• pp.1414-1416
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• 2016

In this paper, a SWB (Super-WideBand) dipole antenna with self-complementary structure is proposed for signal intelligence. The proposed antenna consists of a self-complementary dipole antenna and a tapered balun for balanced feeding. The measured -10 dB reflection bandwidth of the proposed antenna is more than 28:1 (0.73-20 GHz) and 3 dB axial ratio bandwidth is 3.25:1 (1.91-6.22 GHz) with RHCP (Right Hand Circular Polarization) at +z direction. The measured radiation patterns are omni-directional in lower frequency band and bi-directional in higher frequency band. The measured peak gain within -10 dB reflection bandwidth varies from 2.83 dBi to 7.66 dBi.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1871-1874
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• 2002

This paper describes a realization of a linearized transconductor using a CMOS complementary pair. The proposed transconductor is driven by a grounded signal source. How to cancel the offset current is described, Moreover , how to control the transconductance is described . It is shown that power consumption of the proposed transconductor without the control circuit is about half as low as that of the conventional Wang’s OTA through computer simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.12
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• pp.6484-6487
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• 2013

This paper reports the direct controller for nonlinear plants using a neural network. The controller was composed of an approximate controller and a neural network auxiliary controller. The approximate controller provides rough control and the neural network controller gives the complementary signal to further reduce the output tracking error. This method does not place too much restriction on the type of nonlinear plant to be controlled. In this method, a RBF neural network was trained and the system showed stable performance for the inputs it has been trained for. The simulation results showed that it was quite effective and could realize satisfactory control of the nonlinear system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.4
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• pp.685-695
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• 1997

In this paper, a new CMOS continuous-time fully-differential current-mode integrator is proposed as a basic building block of the low-voltage high frequency current-mode active filter. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined by a small-signal transconductance and a MOSFET gate capacitance can be expanded by the complementary transconductance of the proposed integrator. And also the magnitude of pole and zero are increased. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time fully-differential integrator with NMOS-gm. These results are verified by the small signal analysis and the SPICE simulation. As an application circuit of the proposed fully-differential current-mode integrator, the three-pole Chebyshev lowpass filter is designed using 0.8.$\mu$m CMOS processing parameters. SPICE simulation predicts a 3-dB bandwidth of 148MHz and power dissipation of 4.3mW/pole for the three-pole filter with 3-V power supply.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.24-28
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• 2010

A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.

• Nuclear Engineering and Technology
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• v.55 no.4
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• pp.1507-1517
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• 2023

Centrifugal pumps are a crucial part of nuclear power plants, and their dependable and safe operation is crucial to the security of the entire facility. Cavitation will cause the centrifugal pump to violently vibration with the large number of vacuoles generated, which not only affect the hydraulic performance of the centrifugal pump but also cause structural damage to the impeller, seriously affecting the operational safety of nuclear power plants. A closed cavitation test bench of a centrifugal pump is constructed, and a method for precisely identifying the cavitation state is proposed based on Complementary Ensemble Empirical Mode Decomposition (CEEMD) and Deep Residual Shrinkage Network (DRSN). First, we compared the cavitation sensitivity of pressure fluctuation, vibration, and liquid-borne noise and decomposed the liquid-borne noise by CEEMD to capture cavitation characteristics. The decomposition results are sent into a 12-layer deep residual shrinkage network (DRSN) for cavitation identification training. The results demonstrate that the liquid-borne noise signal is the most cavitation-sensitive signal, and the accuracy of CEEMD-DRSN to identify cavitation at different stages of centrifugal pumps arrives at 94.61%

• ETRI Journal
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• v.40 no.1
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• pp.133-145
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• 2018

Robustness, payload, and imperceptibility of audio watermarking algorithms are contradictory design issues with high-level security of the watermark. In this study, the major issue in achieving high payload along with adequate robustness against challenging signal-processing attacks is addressed. Moreover, a security code has been strategically used for secure transmission of data, providing tamper detection at the receiver end. The high watermark payload in this work has been achieved by using the complementary features of third-level detailed coefficients of discrete wavelet transform where the human auditory system is not sensitive to alterations in the audio signal. To counter the watermark loss under challenging attacks at high payload, Daubechies wavelets that have an orthogonal property and provide smoother frequencies have been used, which can protect the data from loss under signal-processing attacks. Experimental results indicate that the proposed algorithm has demonstrated adequate robustness against signal processing attacks at 4,884.1 bps. Among the evaluators, 87% have rated the proposed algorithm to be remarkable in terms of transparency.

• Journal of Sensor Science and Technology
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• v.28 no.2
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• pp.81-87
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• 2019

One of the major issues in inertial and magnetic measurement unit (IMMU)-based 3D orientation estimation is compensation for magnetic disturbances in magnetometer signals, as the magnetic disturbance is a major cause of inaccurate yaw estimation. In the proposed approach, a kinematic constraint is used to provide a measurement equation in addition to the accelerometer and magnetometer signals to mitigate the disturbance effect on the orientation estimation. Although a Kalman filter (KF) is the most popular framework for IMMU-based orientation estimation, a complementary filter (CF) has its own advantages over KF in terms of mathematical simplicity and ease of implementation. Accordingly, this paper introduces a quaternion-based CF with a constraint-combined correction equation. Furthermore, the weight of the constraint relative to the magnetometer signal is adjusted to adapt to magnetic environments to optimally deal with the magnetic disturbance. In the results of our validation experiments, the average and maximum of yaw errors were $1.17^{\circ}$ and $1.65^{\circ}$ from the proposed CF, respectively, and $8.88^{\circ}$ and $14.73^{\circ}$ from the conventional CF, respectively, showing the superiority of the proposed approach.

• Journal of Sensor Science and Technology
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• v.30 no.2
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• pp.82-87
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• 2021

In this paper, we propose a high-speed, low-power complementary metal-oxide semiconductor (CMOS) binary image sensor featuring a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector based on a double-tail comparator. The GBT photodetector forms a structure in which the floating gate (n+ polysilicon) and body of the PMOSFET are tied, and amplifies the photocurrent generated by incident light. The double-tail comparator compares the output signal of a pixel against a reference voltage and returns a binary signal, and it exhibits improved power consumption and processing speed compared with those of a conventional two-stage comparator. The proposed sensor has the advantages of a high signal processing speed and low power consumption. The proposed CMOS binary image sensor was designed and fabricated using a standard 0.18 ㎛ CMOS process.