• Communications of the Korean Institute of Information Scientists and Engineers
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• v.4 no.2
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• pp.65-73
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• 1986

The PM language is a Compiler writing language which syntax- directly translates a high level language into a intermediate language of matrix form. The PM assembler translates the PM language into recursive subroutines which test input strings or output intermediate terms or call another subroutines. A large subset of PASCAL compiler was written in the PM language.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.5 no.2
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• pp.61-84
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• 1987

This paper deals with actual constructions of programs for experiments in several parsers based on the theoritical results of others that represent on of the most fruiful contributions in computer science. Specifically the report deals with (1) a general computer representation of grammar (2) a precedence parser generator, (3) a LL (1) parser generator, (4) a practical SLR (1)/LALR (1) parser generator.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.6
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• pp.450-454
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• 2015

Short execution time is the major performance factor for computer systems. This performance factor is directly determined by code quality, which is influenced by the compiler's optimizations. However, a compiler has limitations when optimizing source code due to insufficient information. Thus, if programmers can learn the reasons why a compiler fails to apply optimizations, they can rewrite code that is more easily understood by the compiler, and thus improve performance. In this paper, we propose a compiler that provides a programmer with reasons for failed optimization and recognizes programmer's additional information to obtain better optimization. As a result, we obtain performance improvement, i.e., reducing execution time and code size, by taking advantage of additional optimization opportunities.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.169-172
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• 2015

Dalvik is a virtual machine (VM) that is designed to run Java-based Android applications. A trace-based just-in-time (JIT) compilation technique is currently employed to improve performance of the Dalvik VM. However, due to runtime compilation overhead, the trace-based JIT compiler provides only a few simple optimizations. Moreover, because each trace contains only a few instructions, the trace-based JIT compiler inherently exploits fewer optimization and parallelization opportunities than a method-based JIT compiler that compiles method-by-method. So we propose a new method-based JIT compiler, named DEX2C, in order to improve performance by finding more opportunities for both optimization and parallelization in Android applications. We employ C code as an intermediate product in order to find more optimization opportunities by using the GNU C Compiler (GCC), and we will detect parallelism by using the Intel C/C++ parallel compiler and the AESOP compiler in our future work. In this paper, we introduce our DEX2C compiler, which dynamically translates Dalvik bytecodes (DEX) into C code with method granularity. We also describe a new method-based JIT interface in the Dalvik VM for the DEX2C compiler. Our experiment results show that our compiler and its interface achieve significant performance improvement by up to 15.2 times and 3.7 times on average, in Element Benchmark, and up to 2.8 times for FFT in Smartbench.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5B
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• pp.286-294
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• 2007

In ASIP design, compiler is required for performance evaluation of processors being designed. The design of machine specific compiler is time consuming. This paper presents the system which generates C compiler from MDL descriptions. Compiler generation using MDL can support user retargetability and concurrency between compiler design and processor design. However, it must overcome semantics gap between compiler and machine. To handle this problem, the proposed system maps behavioral descriptions to library which contains abstract behavior for each tree pattern. Using mapped instructions and information on register file usage, the proposed system generates back-end interface function of the compiler. Generated compilers, for MIPS R3000, ARM9 cores, have been proved by application programs written in C code.

• Journal of KIISE:Software and Applications
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• v.33 no.9
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• pp.810-821
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• 2006

As XML is widely used across the computer related fields, and it costs expensive for its compiler, the study on the automatic generation of the compiler is becoming important. In addition, though the XMLSchema became a standard, there have been few works on the automatic compiler generation for XML applications based on the XMLSchema. In this paper, we introduce a method that we can automatically generate a compiler for an XML application based on the XMLSchema. Our XML compiler generator uses data type information in XMLSchema document and semantic information in another file and produces semantic classes and a compiler for the XML application. The compiler parses an XML document, builds a tree in which each node is an instance of semantic class, and processes the document through the traversal of the tree.

• The Journal of Korean Association of Computer Education
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• v.16 no.6
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• pp.33-43
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• 2013

Compiler and language implementation courses have long been recognized as an important subject in Computer Science curricula. It is because not only the knowledge for a compiler plays important roles in understanding programming languages and systems but compiler technologies can be used in many applications. However it requires much effort to teach effectively it due to limited resources and time restriction. We present a compiler teaching model using Edu-IDEC which is a development environment of educational compilers. Edu-IDEC is a tool on the robot platform. It uses the Eclipse plug-ins and has functions like compiler developing tools, a reference compiler, visualization tool of syntax tree, visualization tool of object language, NXT robot controllers, and its simulator. We also present the evaluation results for our model by applying it to an actual class.

• The Transactions of the Korea Information Processing Society
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• v.4 no.1
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• pp.255-269
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• 1997

In this paper, we describe the implementation of C cross-compiler for the ES-C2340 DSP2 processor by using the GNU compiler. For the rapid and efficient developing of the compiler and other parts like the processor-dependent back -end which is implemented newly to build the compiler. This approach has several advantages. First, as we use GNU compiler's well-proved excellent optimization method and multi-language support capability, we can improve he efficiency and generality of the compiler. Second, as we concentrate on the high-level language as logic approving tool in processor developing process. And to support the cross-compiler, we also implement a text-level pre-linker.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.3
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• pp.189-197
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• 2022

With the development of high-performance computing technology and the advancement of numerical model, it is possible to predict the better weather forecasting. The purpose of this paper is the performance improvement for the SCAM climate model for the model running time excluding the compilation time. Therefore, the model previously performed using the Intel Fortran Compiler was changed to PGI Fortran Compiler. To this end, we reconfigure system environment variables, reset compilation options, install dependencies SW and library, and modify source code. In addition, we proposed and applied the 'PGI Compile with OpenACC' method. As a result, when the compiler was changed from intel to PGI, it led to an improvement of 6.08% in running time and when the openACC method was applied, it led to an improvement of 43.05% in running time. This demonstrates that the PGI Compile with OpenACC method proposed in this paper leads to excellent performance.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.381-384
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• 2001

This paper describes the features and development of a RAM compiler that can generate low power, high speed, synchronous CMOS SRAM. The compiled SRAM can be configurable from 64bytes to 16Kbytes in one bank and has 2ns access time typically. Basic cells are developed using 2-poly, 4-metal 0.35um CMOS technology. This SRAM compiler is developed using SKIL $L^{TM}$ language and generates layout and schematic in Cadence environment.