• International conference on construction engineering and project management
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• 2009.05a
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• pp.316-322
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• 2009

The more repetitive, complex and objective the work, the more effective automation is. Code checking is an example of this. Checking building codes through a thick set of drawings is error-prone and time-consuming. In order to overcome this problem, several organizations have initiated efforts to automate building-code checking. Initiated study mainly focused on checking codes for invalidation, required size and crash, and then area of checkable codes have been expanding. But, it has not been considered for codes regarding anti-disaster/egress, which is also issued these days. This study is about how to automatically check codes for anti-disaster and egress based on Korea building codes. The codes can be categorized as five sections: egress way, material/capability, principals of evacuation, evacuation stairway and fire protection partition. To check automatically, there are problems, such as expression of codes for egress and limitation of extractable information from the BIM model. This paper shows what problems exist and assignments to be resolved. Also, current developing processes are presented, and suggestions are made about the direction for the work that remains.

• Structural Engineering and Mechanics
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• v.89 no.4
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• pp.363-374
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• 2024

Significant changes have been made to estimate the punching shear capacity for edge column-slab joints in the latest editions of most current codes. The revised equations account for axial forces as well as moments conveyed to columns from slabs, which have a substantial impact on the punching resistance of such joints. Many key design parameters, such as reinforcement-ratio, concrete strength, size-effect, and critical-section perimeter, were treated differently or even ignored in various code provisions. Consequently, wide ranges of predicted punching shear strength were detected by applying different code formulas. Therefore, it is essential to assess the various current Codes' design-equations. Because of the similarity in estimated outcomes, only the ACI, EC, and SNiP are used in this study to cover a wide range of estimation ranges from highly conservative to unconservative. This paper is devoted to analyzing the techniques in these code provisions, comparing the estimated punching resistance with available experimental data, and finally developing efficient models predicting the punching capacity of edge column-slab connections. 63 samples from past investigations were chosen for validation. To appropriately predict the punching shear, newly updated equations for ACI and SNiP are provided based on nonlinear regression analysis. The proposed equations'results match the experimental data quite well.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.118-124
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• 2008

For forward error correction, DVB-S2, which is the digital video broadcasting forward error coding and modulation standard for satellite television, uses a system based the concatenation of BCH with LDPC inner coding. In DVB-S2 the LDPC codes are defined for 11 different code rates, which means that a DVB-S2 LDPC decoder should support multiple code rates. Seven of the 11 code rates, 3/5, 2/3, 3/4, 4/5, 5/6, 8/9, and 9/10, are regular and the rest four code rates, 1/4, 1/3, 2/5, and 1/2, are irregular. In this paper we propose a flexible decoder for the regular LDPC codes. We combined the partially parallel decoding architecture that has the advantages in the chip size, the memory efficiency, and the processing rate with Benes network to implement a DVB-S2 LDPC decoder that can support multiple code rates with a block size of 64,800 and can configure the interconnection between the variable nodes and the check nodes according to the parity-check matrix. The proposed decoder runs correctly at the frequency of 200MHz enabling 193.2Mbps decoding throughput. The area of the proposed decoder is $16.261m^2$ and the power dissipation is 198mW at a power supply voltage of 1.5V.

• The KIPS Transactions:PartC
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• v.13C no.7 s.110
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• pp.803-812
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• 2006

This paper analytically evaluates the FEC(Forward Error Correction) symbol size's effect on the performance and energy consumption of 802.11 protocol with the block FEC algorithm over WSN(Wireless Sensor Network). Since the basic recovery unit of block FEC algorithms is symbols not bits, the FEC symbol size affects the packet correction rate even with the same amount of FEC check bits over a given WSN channel. Precisely, when the same amount of FEC check bits are allocated, the small-size symbols are effective over channels with frequent short bursts of propagation errors while the large ones are good at remedying the long rare bursts. To estimate the effect of the FEC symbol site, the paper at first models the WSN channel with Gilbert model based on real packet traces collected over TIP50CM sensor nodes and measures the energy consumed for encoding and decoding the RS (Reed-Solomon) code with various symbol sizes. Based on the WSN channel model and each RS code's energy expenditure, it analytically calculates the transmission efficiency and power consumption of 802.11 equipped with RS code. The computational analysis combined with real experimental data shows that the RS symbol size makes a difference of up to 4.2% in the transmission efficiency and 35% in energy consumption even with the same amount of FEC check bits.

• Journal of Korea Multimedia Society
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• v.8 no.11
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• pp.1556-1564
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• 2005

Various optimization techniques are deployed in the compilation process of a source program for improving the program's execution speed and reducing the size of the source code. Of the optimization pattern matching techniques, the string pattern matching technique involves finding an optimal pattern that corresponds to the intermediate code. However, it is deemed inefficient due to excessive time required for optimized pattern search. The tree matching pattern technique can result in many redundant comparisons for pattern determination, and there is also the disadvantage of high cost involved in constructing a code tree. The objective of this paper is to propose a table-driven code optimizer using the DFA(Deterministic Finite Automata) optimization table to overcome the shortcomings of existing optimization techniques. Unlike other techniques, this is an efficient method of implementing an optimizer that is constructed with the deterministic automata, which determines the final pattern, refuting the pattern selection cost and expediting the pattern search process.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1495-1507
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• 1993

In this paper, an implementation of RS (Reed-Solomon) code decoder for CDP (Compact Disc Player) using microprogramming method is presented. In this decoding strategy, the equations composed of Newton's identities are used for computing the coefficients of the error locator polynomial and for checking the number of erasures in C2(outer code). Also, in C2 decoding the values of erasures are computed from syndromes and the results of C1(inner code) decoding. We pulled up the error correctability by correcting 4 erasures or less. The decoder contains an arithmetic logic unit over GF(28) for error correcting and a decoding controller with programming ROM, and also microinstructions. Microinstructions are used for an implementation of a decoding algorithm for RS code. As a result, it can be easily modified for upgrade or other applications by changing the programming ROM only. The decoder is implemented by the Logic Level Modeling of Verilog HDL. In the decoder, each microinstruction has 14 bits( = 1 word), and the size of the programming ROM is 360 words. The number of the maximum clock-cycle for decoding both C1 and C2 is 424.

• Journal of IKEEE
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• v.17 no.3
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• pp.352-359
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• 2013

This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.3C
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• pp.255-263
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• 2010

In this paper, we present an efficient cooperative transmission scheme for high speed 60GHz WPAN system. In 60GHz, the cooperative transmission with relay is effective scheme because signals are exceedingly attenuated according to the distance and the transmission is impossible when there is no LOS between transmitter and receiver. Moreover, the reliability of signal in destination can be improved by receiving data from a relay as well as a transmitter. However, the overall data rate is reduced because transmission time is more required for relay. To solve this problem, we propose a cooperative transmission scheme with RS-CC serial concatenated codes. In the proposed cooperative transmission scheme, the relay can reduce the transmission data size because the only parity bits of systematic RS code are transmitted after encoding by CC. But the computational complexity is increased at the relay and the destination.

• The Transactions of the Korea Information Processing Society
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• v.1 no.2
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• pp.215-224
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• 1994

In this paper, the rotation and size invariant fingerprint recognition using the neural network EART (Extended Adaptive Resonance Theory) is studied ($515{\times}512$) gray level fingerprint images are converted into the binary thinned images based on the adaptive threshold and a thinning algorithm. From these binary thinned images, we extract the ending points and the bifurcation points, which are the most useful critical feature points in the fingerprint images, using the $3{\times}3$ MASK. And we convert the number of these critical points and the interior angles of convex polygon composed of the bifurcation points into the 40*10 critical using the weighted code which is invariant of rotation and size as the input of EART. This system produces very good and efficient results for the rotation and size variations without the restoration of the binary thinned fingerprints.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.5
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• pp.390-399
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• 1988

A conventional BTC has the merit of real time processing and simple computation, but has the problem that its compression rate is low. In this paper, a modified BTC using the Quad Tree which is frequently used in binary image is proposed. The method results in the low compression rate by decreasing the total number of subblocks by mean of making the size of a subblock large in the small variation area of graty level and the size af a subblock small in the large variation area of gary level. For the effective transmission of bit plane, the Huffman run-lengh code for the large size of a subblock and the lookup table for tha small size of a subblock are used. The proposed BTC method show the result of coding 256 level image at the average data rate of about 0.8 bit/pixel.