• Journal of Korea Multimedia Society
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• v.14 no.7
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• pp.849-857
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• 2011

Gaming on demand(GOD) makes people enjoy games by encoding and transmitting game screen at a server side, and decoding the video at a client side. In this paper, we propose a fast game video encoder for multiple users over network with low-powered devices. In the proposed system, the computational complexity of game encoders is reduced by using scene descriptors, which consists of an object motion vector, global motion, and scene change. With additional information from game engines, the proposed encoder does not need to perform various complexity processes such as motion estimation and ratedistortion optimization. The motion estimation and rate-distortion optimization skipped by scene descriptors. We found that the proposed method improved 192 % in terms of FPS, compared with x264 software. With partial assembly code, we also improved coding speed by 86 % in terms of FPS. We found that the proposed fast encoder could encode over 60 FPS for real-time GOD applications.

• KIISE Transactions on Computing Practices
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• v.23 no.9
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• pp.535-541
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• 2017

Today, the scale of the computer software market has increased, and massive sized software has been developed to satisfy diverse requirements. In this context, software complexity is increasing and the quality of software is becoming more difficult to manage. In particular, software reuse is important for the improvement of the environments of legacy systems and new system development. In this paper, we propose a method to reuse modules that are certified by quality. Reusable levels are divided into code area (method, class, and component), project domain, and business levels. Based on the coupling and cohesion of software complexity, we propose a reusable module extraction mechanism with reusability metrics, which constructs a visualization of the "reusable module's chunk" based on the method and class levels. By applying reverse engineering to legacy projects, it is possible to identify reusable modules/objects/chunks. If these modules/objects/chunks are to be reused to develop an extension system or similar new system, we need to ensure software reliability in order to reduce the time and cost of software development.

• Journal of Broadcast Engineering
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• v.15 no.6
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• pp.749-756
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• 2010

The signal space diversity is one of the promising transmission techniques in next generation mobile TV service. However, DVB-T2 does not consider the multiple antennas (MIMO) so that the cyclic Q-delay method, a component interleaver in DVB-T2, causes a critical issue in detecting symbols at the receiver side by increasing the inter-symbol dependency. To solve this problem, the component-swapping technique is proposed, which limits the inter-symbol dependency in order to reduce detection complexity. In this paper, the achievable gain of a component-swapping technique combined with 16K LDPC code defined in DVB-T2 is evaluated by computer simulations. From the results, the gain is confirmed in terms of BER and receive complexity compared to legacy component interleaver methods.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.1
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• pp.17-23
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• 2015

In this paper, we propose an efficient joint demodulation and decoding scheme for FTN (Faster than Nyquist) systems. Several previous works have demonstrated that ISI (Inter Symbol Interference) cancellation schemes based on BCJR (Bahl-Cocke-Jelinek-Raviv) algorithm are suitable for FTN systems. Unfortunately, required complexity of the previous ISI cancellation schemes is very high, especially when a multi-level modulation scheme is employed. In this paper, we propose a joint demodulation and decoding scheme for FTN systems with an iteratively decodable channel coding scheme and a multi-level modulation. Compared with the previously proposed schemes, the proposed scheme not only offers reliable performance but also requires relatively low complexity. Also, the proposed scheme can be easily applied to the FTN system with a multi-level modulation with a minor modification.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12B
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• pp.2382-2390
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• 1999

In this paper, we employed a new quantization scheme called sample-adaptive product quantizer (SAPQ) to quantize image data based on the differential pulse code modulation (DPCM) coder, which has fixed length outputs and high bit rates. In order to improve the performance of traditional DPCM coders, the scalar quantizer should be replaced by the vector quantizer (VQ). As the bit rate increases, it will be nearly impossible to implement a conventional VQ or modified VQ, such as the tree-structured VQ, even if the modified VQ can significantly reduce the encoding complexity. SAPQ has a form of the feed-forward adaptive scalar quantizer having a short adaptation period. However, since SAPQ is a structurally constrained VQ, SAPQ can achieve VQ-level performance with a low encoding complexity. Since SAPQ has a scalar quantizer structure, by using the traditional scalar value predictors, we can easily apply SAPQ to DPCM coders. For synthetic data and real images, by employing SAPQ as the quantizer part of DPCM coders, we obtained a 2~3 dB improvement over the DPCM coders, which are based on the Lloyd-Max scalar quantizers, for data rates above 4 b/point.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.9C
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• pp.891-897
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• 2003

Partial response maxim likelihood (PRML) is a powerful and indispensable detection scheme for perpendicular magnetic recording channels. The performance of PRML can be improved by incorporating a noise prediction scheme into branch metric computations of Viterbi algorithm (VA). However, the systems constructed by VA have shortcomings in the form of high complexity and cost. In this connection, a new simple detection scheme is proposed by exploiting the minimum run-length parameter d=1 of RLL code. The proposed detection scheme have a slicer instead of Viterbi detector and a noise predictor as a feedback filter. Therefore, to improve BER performance, the proposed detection scheme is extended to dual detection scheme for improving the BER performance. Simulation results show that the proposed scheme has a comparable performance to noise-predictive maximum likelihood (NPML) detector with less complexity when the partial response (PR) target is (1,2,1).

• The Journal of the Acoustical Society of Korea
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• v.20 no.5
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• pp.35-47
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• 2001

This paper describes an efficient harmonic-CELP speech coder by taking advantages of harmonic and CELP coders into account. According to frame voicing decision, the proposed harmonic-CELP coder adopts the RP-VSELP coder as a fast CELP in case of an unvoiced frame, or an improved harmonic coder in case of a voiced frame. The proposed coder has main features as follows: simple pitch detection, fast harmonic estimation, variable dimension harmonic vector quantization, perceptual weighting reflecting frequency resolution, fast harmonic synthesis, naturalness control using band voicing, and multi-mode. These features make the proposed coder require very low complexity, compared with HVXC coder To demonstrate the performance of the proposed coder, a 2.4 kbps coder has been implemented and compared with reference coders. From results of informal listening tests, the proposed coder showed good quality while requiring low delay and complexity.

• The KIPS Transactions:PartC
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• v.11C no.1
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• pp.75-80
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• 2004

An iterative soft-decision decoding algorithm of block codes is proposed. With careful examinations of the first hard-decision decoding result, the candidate codewords are efficiently searched for. An approach to reducing decoding complexity and lowering error probability is to select a small number of candidate codewords. With high probability, we include the codewords which are at the short distance from the received signal. The decoder then computes the distance to each of the candidate codewords and selects the codeword which is the closest. We can search for the candidate codewords which make the error patterns contain the bits with small reliability values. Also, we can reduce the cases that we select the same candidate codeword already searched for. Computer simulation results are presented for (23,12) Golay code. They show that decoding complexity is considerably reduced and the block error probability is lowered.

• Journal of Communications and Networks
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• v.7 no.2
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• pp.157-170
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• 2005

The combination of multiple antennas and multi-carrier code division multiple-access (MC-CDMA) is a strong candidate for the downlink of the next generation mobile communications. The study of such systems in scenarios that model real-life trans-missions is an additional step towards an optimized achievement. We consider a realistic MIMO channel with two or four transmit antennas and up to two receive antennas, and channel state information (CSI) mismatches. Depending on the mobile terminal (MT) class, its number of antennas or complexity allowed, different data-rates are proposed with turbo-coding and asymptotic spectral efficiencies from 1 to 4.5 bit/s/Hz, using three algorithms developed within the European IST-MATRICE project. These algorithms can be classified according to the degree of CSI at base-station (BS): i) Transmit space-frequency prefiltering based on constrained zero-forcing algorithm with complete CSI at BS; ii) transmit beamforming based on spatial correlation matrix estimation from partial CSI at BS; iii) orthogonal space-time block coding based on Alamouti scheme without CSI at BS. All presented schemes require a reasonable complexity at MT, and are compatible with a single-antenna receiver. A choice between these algorithms is proposed in order to significantly improve the performance of MC-CDMA and to cover the different environments considered for the next generation cellular systems. For beyond-3G, we propose prefiltering for indoor and pedestrian microcell environments, beamforming for suburban macrocells including high-speed train, and space-time coding for urban conditions with moderate to high speeds.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2A
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• pp.20-25
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• 2005

A high performance Viterbi decoder is designed using modified register exchange scheme and block decoding method. The elimination of the trace-back operation reduces the operation cycles to determine the merging state and the amount of memory. The Viterbi decoder has low latency, efficient memory organization, and low hardware complexity compared with other Viterbi decoding methods in block decoding architectures. The elimination of trace-back also reduces the power consumption for finding the merging state and the access to the memory. The proposed decoder can be designed with emphasis on either efficient memory or low latency. Also, it has a scalable structure so that the complexity of the hardware and the throughput are adjusted by changing a few design parameters before synthesis.