• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1996년도 Proceedings of the Korea Automatic Control Conference, 11th (KACC); Pohang, Korea; 24-26 Oct. 1996
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• pp.255-258
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• 1996

This paper describes a DC voltage controller for the DC power supply which is constructed using the full-bridged MOS-FET DC-to-RF power inverter and rectifier. The full-bridged MOS-FET DC-to-RF inverter consisting of four MOSFET arrays and an output power transformer has a control function which is able to control the RF output power when the widths of the pulse voltages which are fed to four MOS-FET arrays of the fall-bridged inverter are changed using the pulse width control circuit. The power conversion efficiency of the full-bridged MOS-FET DC-to-RF power inverter was approximately 85 % when the duty cycles of the pulse voltages were changed from 30 % to 50 %. The RF output voltage from the full-bridged MOS-FET DC-to-RF inverter is fed to the rectifier circuit through the output transformer. The rectifier circuit consists of GaAs schottky diodes and filters, each of which is made of a coil and capacitors. The power conversion efficiency of the rectifier circuit was over 80 % when the duty cycles of the pulse voltages were changed from 30 % to 50 %. The output voltage of the rectifier circuit was changed from 34.7V to 37.6 V when the duty cycles of the pulse voltages were changed from 30 % to 50 %.

• 항공우주기술
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• 제2권1호
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• pp.108-116
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• 2003

본 연구는 통신위성 전력제어장치(Power control&Distribution Unit)의 설계 및 해석에 관한 내용을 기술한다. 위성체 전력제어장치는 임무기간동안 각 서브시스템과 탑재체에 충분한 전력을 공급하여야 하며, 또한 우주환경 하에서 높은 신뢰성 및 성능이 요구된다. 전력제어 및 분배장치의 제어회로를 위해 버스전압검출 및 필터회로, 오차신호 증폭회로 그리고 SAS 및 BPC 오차신호 회로가 포함되었다. 설계된 제어보상회로에 대한 주파수 응답특성분석을 통해 각 회로의 위상여유와 이득이 분석되었다. 또한 배터리 충/방전을 위한 BPC회로 분석을 통해 배터리 충전 연속모드, 배터리 방전 연속/불연속 모드에서의 입출력 전달함수가 제시되었다.

• Journal of Advanced Marine Engineering and Technology
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• 제31권8호
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• pp.975-982
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• 2007

The single-phase switched reluctance motor(SRM) drive requires DC source which is generally supplied through a rectifier connected with a commercial source. The rectifier is consist of a diode full bridge and a filter circuit. Usually the filter circuit uses capacitor with large value capacitance to reduce ripple component of DC power. Although the peak torque ripple of SRM is small, the short charge and discharge current of the filter capacitor draws the low power factor and system efficiency. A modified single phase SRM drive system is presented in this paper, which includes drive circuit realizing reduction of torque ripple and improvement of power factor. In the proposed drive circuit, one switching part and diode which can separate the output of AC/DC rectifier from the filter capacitor is added. Also, a upper switch of drive circuit is exchanged a diode in order to reduce power switching device. Therefore the number of power switch device is not changed, two diodes are only added in the SRM drive. To verify the proposed system, some simulation and experimental results are presented.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 전력전자학술대회 논문집
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• pp.193-196
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• 2001

This paper describes an improved short-circuit protection for a multilevel ac/dc power converter The output do power of the proposed converter can be disconnected from the load within several hundred microseconds at the instant of short-circuit fault. Once the fault has been cleared the dc power is reapplied to the load. The rising time of the do load voltage is as small as several hundred microseconds, and there is no overshoot of the dc voltage because the do output capacitors hold undischarged state. Therefore, the proposed converter can be used for a power supply, which requires a rapid disconnection of the load from the power supply in the case of a short circuit, as well as a rapid connection the load to the power supply after the clearance of the short circuit condition.

• 전자공학회논문지SC
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• 제40권6호
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• pp.16-23
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• 2003

본 논문에서 보청기를 위한 개별 BJT 소자의 효과적인 바이어스 회로를 제안한다. 보청기에 널리 사용되는 컬렉터 귀환 바이어스 회로는 부귀환 저항을 가지고 있다. 이 저항은 AC와 DC에 동시에 영향을 줌으로서 DC 바이어스 점의 변화 없이 증폭기의 이득을 변화시키기 어렵다. 또한 기존회로는 보청기의 이득이 높을 경우 전원 잡음의 정귀환으로 발진할 수 있는 단점이 있다. 제안된 회로는 컬렉터 귀환 바이어스회로에 베이스와 전원 사이에 컬렉터 저항보다 β배 더 큰 저항을 추가하여 기존회로의 두 가지 단점을 줄일 수 있다. 제안된 회로에서 DC 바이어스 점의 변화 없이 증폭기의 이득을 변경 할 수 있고 모의실험에서 기존회로보다 전원 잡음 이득을 18.5%정도 감소시킬 수 있다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.138-139
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• 2017

This paper describes the design and implementation of a trigger circuit which can be series connected with main pulse circuit for a xenon flash lamp driver. For generating high voltage, the trigger circuit is designed as an inductive energy storage pulsed power modulator with 2 state step-up circuit consisting of a boost converter and a flyback circuit. In order to guarantee pulse width, a resonant capacitor on the output side of the flyback circuit is designed. This capacitor limits the output voltage to protect the flyback switch. In addition, to protect another power supply of xenon flash lamp driver from trigger pulse, the high voltage transformer which can carry the full current of main pulse is designed. To verify the proposed design, the trigger circuit is developed with the specification of maximum 23 kV, 0.6 J/pulse output and tested with a xenon flash lamp driver consisting of a main pulse circuit and a simmer circuit.

• 전자공학회논문지
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• 제51권1호
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• pp.52-56
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• 2014

본 논문은 고효율 전력증폭기는 무선전력전송을 위한 게이트와 드레인 바이어스 조절 회로를 사용하여 설계하였다. 이 조절 회로는 PAE (Power Added Efficiency)를 개선하기 위해 사용되었다. 게이트와 드레인 바이어스 조절 회로는 directional coupler, power detector, and operational amplifier로 구성되어있다. 구동증폭기를 사용하여 고이득 2단 증폭기는 전력증폭기의 낮은 입력단에 사용되었다. 게이트와 드레인 바이어스 조절회로를 사용하여 제안된 전력증폭기는 낮은 전력에서 높은 효율성을 가질 수 있다. PAE는 80.5%까지 향상되었고 출력전력은 40.17dBm이다.

• 전자공학회지
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• 제25권5호
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• pp.31-41
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• 1998

With the advent of portable electronic systems, power consumption has recently become a major issue in circuit and system design. Furthermore, the sophisticated fabrication technology makes it possible to embed more functions and features in a VLSI chip, consequently calling for both higher performance and lower power to deal with the ever growing complexity of system algorithms than in the past. VLSI designers should cope with two conflicting constraints, high performance and low power, offering an optimum trade off of these constraints to meet requirements of system. Historically, VLSI designers have focused on performance improvement, and power dissipation was not a design criteria but an afterthought. This design paradigm should be changed, as power is emerging as the most critical design constraint. In VLSI design, low power design can be accomplished through many ways, for instance, process, circuit/logic design, architectural design, and etc.. In this paper, a few low power design examples, which have been used in 8 bit micro-controller core, and can be used also in 4/16/32 bit micro-controller cores, are presented in the areas of circuit, logic and architectural design. We first propose a low power guidelines for micro-controller design in SAMSUNG, and more detailed design examples are followed applying 4 specific design guidelines. The 1st example shows the power reduction through reduction of number of state clocks per instruction. The 2nd example realized the power reduction by applying RISC(Reduced Instruction Set Computer) concept. The 3rd example is to optimize the algorithm for ALU(Arithmetic Logic Unit) to lower the power consumption, Lastly, circuit cells designed for low power are described.

• Journal of Power Electronics
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• 제15권4호
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• pp.1131-1138
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• 2015

This study presents an input-powered high-efficiency interface circuit for energy harvesting systems, and introduces a zero standby power design to reduce power consumption significantly while removing the external power supply. This interface circuit is composed of two stages. The first stage voltage doubler uses a positive feedback control loop to improve considerably the conversion speed and efficiency, and boost the output voltage. The second stage active diode adopts a common-grid operational amplifier (op-amp) to remove the influence of offset voltage in the traditional comparator, which eliminates leakage current and broadens bandwidth with low power consumption. The system supplies itself with the harvested energy, which enables it to enter the zero standby mode near the zero crossing points of the input current. Thereafter, high system efficiency and stability are achieved, which saves power consumption. The validity and feasibility of this design is verified by the simulation results based on the 65 nm CMOS process. The minimum input voltage is down to 0.3 V, the maximum voltage efficiency is 99.6% with a DC output current of 75.6 μA, the maximum power efficiency is 98.2% with a DC output current of 40.4 μA, and the maximum output power is 60.48 μW. The power loss of the entire interface circuit is only 18.65 μW, among which, the op-amp consumes only 2.65 μW.

• 전력전자학회논문지
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• 제21권4호
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• pp.335-342
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• 2016

This paper proposes an energy storage-assisted, series-connected module-integrated power conversion system that integrates a photovoltaic power conditioner and a charge balancing circuit. In conventional methods, a photovoltaic power conditioner and a cell-balancing circuit are needed for photovoltaic systems with energy storage devices, but they cause a complex configuration and high cost. Moreover, an imbalanced output voltage of the module-integrated converter for PV panels can be a result of partial shading. Partial shading can lead to the fault condition of the boost converter in shaded modules and high voltage stresses on the devices in other modules. To overcome these problems, a bidirectional buck-boost converter with an integrated magnetic device operating for a charge-balancing circuit is proposed. The proposed circuit has multiple secondary rectifiers with inductors sharing a single magnetic core, which works as an inductor for the main bidirectional charger/discharger of the energy storage. The secondary rectifiers operate as a cell-balancing circuit for both energy storage and the series-connected multiple outputs of the module-integrated converter. The operating principle of the cell-balancing power conversion circuit and the power stage design are presented and validated by PSIM simulation for analysis. A hardware prototype with equivalent photovoltaic modules is implemented for verification. The results verify that the modularized photovoltaic power conversion system in the output series with an energy storage successfully works with the proposed low-cost bidirectional buck-boost converter comprising a single magnetic device.