• Transactions on Electrical and Electronic Materials
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• v.17 no.2
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• pp.118-120
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• 2016

A coplanar waveguide employing periodic 3D coupling structures (CWP3DCS) was developed for application in miniaturized on-chip passive components on silicon radio frequency integrated circuits (RFIC). The CWP3DCS showed the shortest wavelength of all silicon-based transmission line structures that have been reported to date. Using CWP3DCS, a highly miniaturized impedance transformer was fabricated on silicon substrate, and the resulting device showed good RF performance in a broad band from 4.6 GHz to 28.6 GHz. The device as was 0.04 mm² in size, which is only 0.74% of the size of the conventional transformer on silicon substrate.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.67-73
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• 2020

In this paper, we used FEM technique to perform warpage and von Mises stress analysis on PCB according to the cavity structures of embedded PCB for FCCSP and the types of prepreg material. One-half substrate model and static analysis are applied to the FEM. According to the analysis results of the warpage, as the gap between the cavity and the chip increased, warpage increased and warpage increased when prepreg material with higher modularity and thermal expansion coefficient was applied. The analysis results of the von Mises stress show that the effect of the gap between the cavity and the chip varies depending on prepreg material. In other words, when material whose coefficient of thermal expansion is significantly higher than that of core material, the stress increased as the gap between the cavity and the chip increased. When the prepreg with the coefficient of thermal expansion lower than the core material is applied, the result of stress is opposite. These results indicate that from a reliability perspective, there is a correlation between the structure of the cavity where embedded chips are loaded and prepreg material.

• Transactions on Electrical and Electronic Materials
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• v.4 no.2
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• pp.10-14
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• 2003

Flexible displays such as plastic-based liquid crystal displays (LCDs) and organic light-emitting diode displays (OLEDDs) have been researched and developed at KETI since 1997. The plastic film substrate is very weak to heat and pressure compared to glass substrate, that its fabrication process is limited to 110$^{\circ}C$ and low pressure. The ITO films were deposited on the bare plastic film substrate by rf-magnetron sputtering. Moreover, in order to maintain uniform cell gap and pressure on the plastic film substrate, we utilized newly-invented jig and fabrication process. Electro-optical characteristics were better than or equivalent to those of typical glass LCDs though it is thinner, lighter-weight, and more robust than glass LCDs.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.8
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• pp.433-437
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• 2000

We fabricated switch module of ATM(Asynchronous Transfer Mode) exchange system with MCM-C(MultiChip Module Co-fired) technology and measured its electrical characteristics. Green tape was used as substrate and Au/Ag paste was used to form the interconnect layers. The via holes were made by drill and filled with metal paste usign screen method. After manufacturing the substrate, chips and passive components were assembled on the substrate. In electrical test, the module showed the output signal of 46.9MHz synchronized with input signal. In the view of substrate size reduction, the area of MCM switch module was 35% of conventional hybrid switch module.

• Microbiology and Biotechnology Letters
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• v.14 no.2
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• pp.199-203
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• 1986

A tubular tormentor was prepared by packing the wood chips and pumping the yeast solution of Saccharomyces formosensis in a tubular column. Investigations to characterize the ethanol fermentation in the immobilized cell tubular fermentor and to compare such a fermentors with other type fermentors were undertaken. Ethanol productivity of 24.4g EtOH/$\ell$.hr has been obtained from glucose substrate. This productivity is higher or compared favourably with that reported in immobilized bio-reactors.

• Journal of Mechanical Science and Technology
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• v.14 no.2
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• pp.251-258
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• 2000

Thermal deformation in an electronic package due to thermal strain mismatch is investigated. The warpage and the in-plane deformation of the package after encapsulation is analyzed using the laminated plate theory. An exact solution for the thermal deformation of an electronic package with circular shape is derived. Theoretical results are presented on the effects of the layer geometries and material properties on the thermal deformation. Several applications of the exact solution to electronic packaging product development are illustrated. The applications include lead on chip package, encapsulated chip on board and chip on substrate.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.4
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• pp.148-153
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• 2003

In this paper, the low voltage 3V Sigma-Delta Digital Analog Converter(DAC) is designed for using in the transmitter of ADSL analog front-end. We have developed the CMOS DAC according to ANSI T1.413-2(DMT) standard specifications of the chip. The designed 4th-order DAC is composed of three block which are 1-bit DAC, 1st-order Switched-Capacitor filter and analog active 2nd-order Resistor-Capacitor(RC) filter. The HSPICE simulation of the designed DAC showing 65db SNR, is connected with 1.1MHz continuous lowpass filter. And also, we have performed the circuits verification and layout verification(ERC, DRC, LVS) followed by fabrication using TSMC 2-poly 5-metal p-substrate CMOS $0.35{\mu}m$ processing parameter. Finally, the chip testing has been performed and presented in the results.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.3
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• pp.39-43
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• 2009

In this paper, the flow characteristics of underfill material driven by capillary action between flip-chip and substrate were investigated. Also, the effects of viscosity level and dispensing point of underfill on flow characteristics were investigated. Flip chip package size was $5mm{\times}5mm{\times}0.65^tmm$, the diameter of solder bump was 100 ${\mu}m$, and the pitch was 150 ${\mu}m$. It was full grid area-array type with 1024 I/Os. The glass substrate was used and the gap between the chip and substrate was 50 ${\mu}m$. For the experimental study, three different underfills with different viscous properties($2000{\sim}3700$ cps), and two different types of dispensing methods(center dot and edge dot) were used. The flow characteristics and filling time of underfill were investigated by using CCD camera. The results show that the edge flow was faster than center flow due to the edge effect, which was caused by the resistance of solder bumps. In case of edge dot dispensing type, the filling time was faster due to the large edge effect, compared to center dot dispensing type. Also, it was found that the underfill flow was faster and the filling time decreased as the viscosity level of underfill was decreased.

• Korean Journal of Materials Research
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• v.19 no.11
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• pp.625-630
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• 2009

Embedding of active devices in a printed circuit board has increasingly been adopted as a future electronic technology due to its promotion of high density, high speed and high performance. One responsible technology is to embedded active device into a dielectric substrate with a build-up process, for example a chipin-substrate (CiS) structure. In this study, desmear treatment was performed before Cu metallization on an FR-4 surface in order to improve interfacial adhesion between electroless-plated Cu and FR-4 substrate in Cu via structures in CiS systems. Surface analyses using atomic force microscopy and x-ray photoemission spectroscopy were systematically performed to understand the fundamental adhesion mechanism; results were correlated with peel strength measured by a 90o peel test. Interfacial bonding mechanism between electrolessplated Cu and FR-4 substrate seems to be dominated by a chemical bonding effect resulting from the selective activation of chemical bonding between carbon and oxygen through a rearrangement of C-C bonding rather than from a mechanical interlocking effect. In fact, desmear wet treatment could result in extensive degradation of FR-4 cohesive strength when compared to dry surface-treated Cu/FR-4 structures.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.7-13
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• 2007

In the optical module for optical communications, the flip chip bonding is used fer the precise alignment of the optical fiber and optical device. In flip chip bonding, the optical device is aligned and welded while observing the alignment mark of substrate and chip by using flip chip bonder in order to bond the optical device at the exact position. In this research, optical passive alignment method of photodiode(PD) flip chip bonding is suggested for low cost optical subassembly. By using the visible He-Ne laser (633nm wavelength), photodiode is easily aligned with emitting spot on the optical fiber with the help of stereoscopic alignment system. We compensated wavelength dependent deviation about 4m to find out real alignment position of 1550nm input laser by ray tracing. The maximum optical coupling efficiency between the optical fiber and photodiode was about 23.3%.