• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.422-424
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• 2009

In this paper, we studied methods that measure chip stack height using slit beam in mold equipment among semiconductor manufacture equipments. We studied two methods to improve chip stack height measurement performance. First, it is relation of camera exposure time and height measurement repeatability. Second we could improve measurement performance applying method of least mean square method for measurement error minimization about PCB(Printed Circuit Board) flexure phenomenon.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.65-71
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• 2007

For chip-stack package applications, Cu filling characteristics into trench vias of $75{\sim}10\;{\mu}m$ width and 3 mm length were investigated with variations of the electroplating current density and the speed of a rotating disc electrode (RDE). Cu filling characteristics into trench vias were improved with increasing the RDE speed. There was a Nernst relationship between half width of trench vias of Cu filling ratio higher than 95% and the minimum RDE speed, and the half width of trenches with 95% Cu filling ratio was linearly proportional to the reciprocal of root of the minimum RED speed.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.612-615
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• 2004

A high-voltage generator is used to program the anti-fuse of the semiconductor chip. A new high-voltage generator consists of PN diodes and new stack type capacitors. An oscillator supply pulses to the high-voltage generator. The pulse period of the oscillator is delayed by controlling gate-voltage of the MOS. The pulse period is about 27ns, therefore the pulse frequency is about 37MHz. The threshold voltage of PN diode is about 0.8V. The capacitance of new stack type capacitor is about 4pF. The output voltage of the new high-voltage generator is about 7.9V and its current capacity is about $488{\mu}$A.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2005.09a
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• pp.51-65
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• 2005

• Korean Journal of Metals and Materials
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• v.48 no.6
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• pp.557-564
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• 2010

Formation of Sn through-silicon-via (TSV) and its interconnection processes were studied in order to form a three-dimensional interconnection structure of chip-stack packages. Different from the conventional formation of Cu TSVs, which require a complicated Cu electroplating process, Sn TSVs can be formed easily by Sn electroplating and reflow. Sn via-filling behavior did not depend on the shape of the Sn electroplated layer, allowing a much wider process window for the formation of Sn TSVs compared to the conventional Cu TSV process. Interlocking joints were processed by intercalation of Cu bumps into Sn vias to form interconnections between chips with Sn TSVs, and the mechanical integrity of the interlocking joints was evaluated with a die shear test.

• Progress in Superconductivity
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• v.9 no.1
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• pp.18-22
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• 2007

For interlayer tunneling spectroscopy using a small stack of $Bi_2Sr_2CaCu_2O_{8+x}$ (Bi-2212) intrinsic junctions in a high-bias range, large self-heating takes place due to the poor thermal conductivity of Bi-2212. In this study, we numerically estimate the self-heating around a Bi-2212 sample stack for I-V or dI/dV-V measurements. Our results show that the temperature discrepancy between the Bi-2212 sample stack and top Au electrodes due to bias-induced self-heating is small enough along the c-axis direction of Bi-2212. On the other hand, the lateral temperature discrepancy between the sample stack and the Bi-2212 on-chip thermometer stack can be as large as ${\sim}20\;K$ for the highest bias required to observe the pseudogap hump structure. We thus suggest a new in-situ ac thermometry, employing the Au current-bias electrode itself deposited on top of the sample stack as the resistive thermometer layer, which is supposed to allow safe temperature measurements for the interlayer tunneling spectroscopy.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.414-420
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• 2005

The ShortStack Micro Server enables any product that contains a microcontroller or microprocessor to quickly and inexpensively become a networked, Internet-accessible device. The ShortStack Micro Server provides a simple way to add LonWorks networking to new or existing smart devices. . It implements the LonTalk protocol and provides the physical interface with the LonWorks communication. The ShortStack host processor can be an 8, 16, or 32-bit microprocessor or microcontrollers. The ShortStack API and driver typically require about 4kbytes of program memory on the host processor and less than 200 bytes of RAM. The interface between host processor and the ShortStack Micro Server may be a Serial Communication Interface (SCI). The LonWorks control module with a high performance is developed, which is composed of the 8 bit PIC Microprocessor for host processor and the smart neuron chip for the ShortStack Micro Server. This intelligent control board is verified as proceeding the various function tests from experimental system with an boost pump and inverter driving systems. It is also confirmed that the developed control module provides stably 0-10VDC linear signal to the input signal of inverter driving system for varying the induction motor speed. Thus, the experimental results show that the fabricating intelligent board carried out very well the various functions in the wide operating ranges of boost pump system. This developed control module expect to apply to industrial fields to require the comparatively exact control and monitoring such as multi-motor driving system with inverter, variable air volume system and the boost pump water supply systems.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.927-930
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• 2003

In this paper, a design of processor IP for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability. To handle the various modes of TCP/IP protocol, hardware and software co-design approach is used rather than the conventional state machine based design. To eliminate delay time due to the data transfer and checksum operation, DAM module which can execute the checksum operation on-the-fly along with data transfer operation is adopted. By programming the on-chip code ROM of RISC processor differently. the designed stack processor can support the packet format conversion operations required in the various TCP/IP protocols.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.891-892
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• 2006

An obstacle is an element for power to small and slim the existing portable communication set. Developed Inductor for Chip-type electric power in needs to solve this. Stack applied Process, and used gap of a magnetic path, and made a height of an element to 1.0T or below, and this development commodity did product for saturation prevention to materials of silver. Saturation current characteristic of Chip-type inductor was low compare with winding-type inductors, but bulk against performance were had superior excellence. Chip-type inductor can raise performance per unit volume compared with the existing inductors at these papers. Therefore, acceleration can get growth of small and slim of a mobile product done, and expect.

• Current Optics and Photonics
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• v.4 no.5
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• pp.428-433
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• 2020

Recently, the on-chip autofocus (AF) function has become essential to the CMOS image sensor. An auto-focus usually operates using phase detection of the photocurrent difference from a pair of AF pixels that have focused or defocused. However, the phase-detection method requires a pair of AF pixels for comparison of readout. Therefore, the pixel variation may reduce AF performance. In this paper, we propose a color-selective AF pixel with a plasmonic nanostructure in a 0.9 μ㎡ pixel. The suggested AF pixel requires one pixel for AF function. The plasmonic nanostructure uses metal-insulator-metal (MIM) stack arrays instead of a color filter (CF). The color filters are formed at the subwavelength, and they transmit the specific wavelength of light according to the stack period and incident angles. For the optical analysis of the pixel, a finite-difference time-domain (FDTD) simulation was conducted. The analysis showed that the MIM stack arrays in the pixels perform as an AF pixel. As the primary metric of AF performance, the resulting AF contrasts are 1.8 for the red pixels, 1.6 for green, and 1.5 blue. Based on the simulation results, we confirmed the autofocusing performance of the MIM stack arrays.