• 제목/요약/키워드: chip processing

검색결과 809건 처리시간 0.03초

Reliable Anisotropic Conductive Adhesives Flip Chip on Organic Substrates For High Frequency Applications

  • Paik, Kyung-Wook;Yim, Myung-Jin;Kwon, Woon-Seong
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2001년도 Proceedings of 6th International Joint Symposium on Microeletronics and Packaging
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    • pp.35-43
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    • 2001
  • Flip chip assembly on organic substrates using ACAs have received much attentions due to many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing compatible with organic substrates. ACAs are generally composed of epoxy polymer resin and small amount of conductive fillers (less than 10 wt.%). As a result, ACAs have almost the same CTE values as an epoxy material itself which are higher than conventional underfill materials which contains lots of fillers. Therefore, it is necessary to lower the CTE value of ACAs to obtain more reliable flip chip assembly on organic substrates using ACAs. To modify the ACA composite materials with some amount of conductive fillers, non-conductive fillers were incorporated into ACAs. In this paper, we investigated the effect of fillers on the thermo-mechanical properties of modified ACA composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. It was observed that reliability results were significantly affected by CTEs of ACA materials especially at the thermal cycling test. Results showed that flip chip assembly using modified ACA composites with lower CTEs and higher modulus by loading non-conducting fillers exhibited better contact resistance behavior than conventional ACAs without non-conducting fillers. Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of $SiO_2filler$ to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. Our results indicate that the electrical performance of ACF combined with electroless Wi/Au bump interconnection is comparable to that of solder joint.

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어닐링 기능을 갖는 CNN칩 설계 (Design of CNN Chip with annealing Capability)

  • 류성환;박병일정금섭전흥우
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 추계종합학술대회 논문집
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    • pp.1041-1044
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    • 1998
  • In this paper the cellular neural networks with annealing capability is designed. The annealing capability helps the networks escape from the local-minimum points and quickly search for the global-minimum point. A 6$\times$6 CNN chip is designed using a $0.8\mu\textrm{m}$ CMOS technology, and the chip area is 2.89mm$\times$2.89mm. The simulation results for hole filling image processing show that the general CNN has a local-minimum problem, but the annealed CNN finds the global-minimum solutions very efficiently.

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Interface Development for the Point-of-care device based on SOPC

  • Son, Hong-Bum;Song, Sung-Gun;Jung, Jae-Wook;Lee, Chang-Su;Park, Seong-Mo
    • Journal of Information Processing Systems
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    • 제3권1호
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    • pp.16-20
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    • 2007
  • This paper describes the development of the sensor interface and driver program for a point of care (POC) device. The proposed pac device comprises an ARM9 embedded processor and eight-channel sensor input to measure various bio-signals. It features a user-friendly interface using a full-color TFT-LCD and touch-screen, and a bluetooth wireless communication module. The proposed device is based on the system on a programmable chip (SOPC). We use Altera's Excalibur device, which has an ARM9 and FPGA area on a chip, as a test bed for the development of interface hardware and driver software.

DSP를 이용한 2차원 평면에서 chip의 위치와 자세보정에 관한 연구 (A study on the correction of a position and orientation of the chip using DSP in the 2nd plane)

  • 유창목;차영엽
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
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    • pp.1316-1319
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    • 1996
  • This paper proposes the algorithm for the correction of a position and orientation of small object such as chip in the precise construction process. In the past, it is general to correct position and orientation of object using human sight and simple vision sensors. But recently, researches using image processing devices have been studied to improve the corrective precision of a position and orientation of object. In this piper, maximum-axis moment and p-theta algorithm are used to correct the position and orientation. Algorithm of maximum-axis moment is widely applied to hetero-object except being applied to a perfect rectangle. This is reason that moments of the X and Y-axis are equal. Therefore, being the shape of a perfect rectangle, the object is applied to other algorithm. In the light of time problem, real-time control is as important as correction of object. To solve it, we use the DSP(Digital Signal Processing) which is far more fast than PC.

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DNA microarray chip을 위한 LIMS (LIMS for DNA microarray chip)

  • 이유진;차재혁;임상택;노정호;심진욱
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2003년도 추계학술발표논문집 (중)
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    • pp.733-736
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    • 2003
  • 본 논문은 DNA microarray chip 을 사용한 실험 결과로 생산되는 대량의 데이터를 효율적으로 관리하기 위한 LIMS 개발에 대해 기술한다. 기존의 상용 LIMS 는 보편적 패턴과 방식을 정규화하여 제공하기 때문에 실험실의 고유한 방식을 포함하긴 어렵다. 본 논문에서는 유연성 있는 LIMS 를 개발하기 위해 특정 실험 중심으로 설계하면서 MAGE-OM 의 표준을 따르도록 디자인하였고, HYLIMS manager 라는 Local Application 과 검색을 주로 이용하는 사용자를 위하여 Web 검색 시스템을 구현하였다. 데이터베이스의 부하를 줄이기 위해 데이터 저장용 DB 와 검색용 DB 를 구분하였고, 데이터를 타입과 처리 형태에 따라 분류하여 관리하였으며 데이터 보안을 위해 실험 관리자가 사용자의 접근 제한을 설정 할 수 있도록 하였다.

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칩 파형 형성을 이용한 DS-CDMA 통신시스템 성능분석 (Performance Evaluation of DS-CDMA Communication Systems using Chip Waveform Shaping)

  • 장문섭;이정재
    • 융합신호처리학회 학술대회논문집
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    • 한국신호처리시스템학회 2001년도 하계 학술대회 논문집(KISPS SUMMER CONFERENCE 2001
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    • pp.65-68
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    • 2001
  • 본 논문에서는 주파수영역에서 동일한 주파수 간격을 갖는 직교반송파에 의하여 만들어지며 DS-CDMA에 주파수 다이버시티 효과를 줄 수 있는 CI 칩 파형 형성 방식에 대하여 검토한다. CI 칩 파형을 이용한 새로운 통신 방식 CI/DS-CDMA을 소개하고 대표적인 주파수 선택성 페이딩 채널환경에서 성능을 분석을 통하여 이 시스템의 주파수 다이버시티 효과가 시간영역에서 경로 다이버시티를 이용하는 RAKE 수신기를 갖는 통상적인 DS-CDMA에 비하여 성능개선 효과를 가져올 수 있음을 보인다.

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Optofluidic packaging and patterning technologies for light emitting devices

  • Chung, Su-Eun;Jang, Ji-Sung;Lee, Seung-Ah;Lee, Ho-Suk;Kwon, Sung-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1272-1273
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    • 2009
  • We demonstrate conformal phosphor coating and patterning methods on light emitting diodes (LEDs) using image processing based optofluidic maskless lithography (IP-OFML) system in microfluidic channels. IP-OFML allows a real-time detection and dynamic mask generation for packaging of randomly dispersed microchips. Our system detects each chip by considering rotation of the chip through image processing regardless of their arrangement error. Therefore, it precisely packages the chip making conformal polymer layer.

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DSP chip과 Microcomputer를 이용한 뇌 유발전위 추정기의 구현 (Implementation of EP waveform Estimator using DSP chip and Microcomputer)

  • 김정우;유세근;민병관;김종원;김성환
    • 대한의용생체공학회:학술대회논문집
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    • 대한의용생체공학회 1993년도 추계학술대회
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    • pp.151-155
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    • 1993
  • Evoked potentials(EP) measured with scalp electrodes are often described as a deterministic process corrupted by uncorrelated electrical activities occuring in the brain and These electrical activities(ongoing EEG) refer to noise in EP recording. The Conventional method to determine the EP waveform requires long recording time. Unfortunately most of algorithm developed are too complicated for implementation in real time. Thus, conner EP recording devices use Ensemble average for real time processing. In this paper introduce EP recording hardware for processing advanced algorithm in real tlne. This hardware is composed of DSP chip(TMS320c25) and microcomputer.

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Quad chip의 외관 불량 검사 시스템 개발 (Development of Visual Inspection System to the defect of Quad chip)

  • 이지연;고국원;한창호
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2015년도 추계학술발표대회
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    • pp.1076-1077
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    • 2015
  • 본 연구에서는 최근 널리 사용되고 있는 QFP(Quad Flat Package)의 소형화 및 대량 생산 Quad chip 공정에서 최종 외관 불량 검사를 위한 기존의 2D 영상 검사 시스템에 3D 영상 검사 시스템을 추가하여 광학 장치를 설계하고 이에 따른 영상처리 알고리즘을 개발하였다. 개발된 검사 장치는 실제 LQFP/TQFP에 생산 공정에 적용되어 불량을 검사에 적용하였으며, 10 회 반복 측정 시 최대 오차는 $1.34{\mu}m$와 측정 오차의 표준편차가 $0.715{\mu}m$으로 요구하는 3차원 불량 검사를 만족할 만한 성능을 보였다.

H.264 on-chip encoder를 위한 programmable processor 성능 향상 (Performance Improvement of the programmable processor designed for H.264 on-chip encoder)

  • 이진용;김경원;허인구;박상현;김용주;백윤흥
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2009년도 추계학술발표대회
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    • pp.19-20
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    • 2009
  • H.264 부호기의 on-chip 상의 구현방법으로는 성능에 중점을 둔 ASIC (application specific integrated circuit) 기반의 접근 방식과 ASIC 보다 성능은 떨어지나 일반성과 유연성에 중점을 둔 ASIP (application specific instruction set architecture) 기반의 설계 방식이 연구되어 왔다. 우리는 영상 압축 응용 범위 내에서는 일반성 및 유연성을 잃지 않으면서도 기존에 문제시 되던 ASIP의 성능은 대폭 개선할 수 있는 ISA와 micro architecture를 제안하고 구현한 바 있다. 본 논문의 핵심적인 기여는 이 ASIP의 추가적인 성능 개선이다.