• Korean Journal of Metals and Materials
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• v.48 no.6
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• pp.557-564
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• 2010

Formation of Sn through-silicon-via (TSV) and its interconnection processes were studied in order to form a three-dimensional interconnection structure of chip-stack packages. Different from the conventional formation of Cu TSVs, which require a complicated Cu electroplating process, Sn TSVs can be formed easily by Sn electroplating and reflow. Sn via-filling behavior did not depend on the shape of the Sn electroplated layer, allowing a much wider process window for the formation of Sn TSVs compared to the conventional Cu TSV process. Interlocking joints were processed by intercalation of Cu bumps into Sn vias to form interconnections between chips with Sn TSVs, and the mechanical integrity of the interlocking joints was evaluated with a die shear test.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2276-2280
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• 2008

In this paper, we present thermal dependancy of LED package element by changing temperature of MCPCB for design high efficiency LED lamp, and confirmed influence of LED chip against temperature with analysis of thermal resistance and thermal capacitance. As increasing temperature, WPOs were decreased from 25 to 22.5 [%] and optical power were also decreased. that is decreased reason of optical power that forward voltage was declined by decrease of energy bandgap. Therefore optical power by temperature of MCPCB should consider to design lamp for street light and security light. Moreover, compensation from declined optical efficiency is demanded when LED package is composed. Also, thermal resistances from chip to metal PCB were decreased from 12.18 to 10.8[$^{\circ}C/W$] by changing temperature. Among the thermal resistances, the thermal resistance form chip to die attachment was decreased from 2.87 to 2.5[$^{\circ}C/W$] and was decreased 0.72[$^{\circ}C/W$] in Heat Slug by chaning temperature. Therefore, because of thermal resistance gap in chip and heat slug, reliability and endurance of high power LED affect by increasing non-radiative recombination in chip from heat.

• Journal of the Korean Society of Industry Convergence
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• v.7 no.4
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• pp.325-330
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• 2004

The forces acting on the tool are an important aspect of maching. For those concerned with the manufacture of machine tools, a knowledge of the forces in needed for estimation of power reguirements and for the design of machine tool elements tool-holders and fixtures, adequately rigid and free from vibration. The force reguired to form the chip is dependent on the shear yield strength of the work material un der cutting conditions which are cutting speed, workpiece, feedrate, insert type. In this study, FG, ML, MP, MC, C, RT inserts were investigated in turning using SM45C, SCM4, SKD11, SUS316, materials. The diameter of materials was 60mm, 80mm, 110mm. This paper presents MP were lowest and SKD11 were largest of the workpiece in cutting forces.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.3
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• pp.186-192
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• 1996

A modified learning rule is introduced for the implementation of feedforward artificial neural networks with on-chip learning circuitry using standard analog CMOS technology. Learning rule, is modified form the EBP (error back propagation) rule which is one of the well-known learning rules for the feedforward rtificial neural nets(FANNs). The employed MEBP ( modified EBP) rule is well - suited for the hardware implementation of FANNs with on-chip learning rule. As a ynapse circuit, a four-quadrant vector-product linear multiplier is employed, whose input/output signals are given with voltage units. Two $2{\times}2{\times}1$ FANNs are implemented with the learning circuitry. The implemented FANN circuits have been simulatied with learning test patterns using the PSPICE circuit simulator and their results show correct learning functions.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.3 no.2
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• pp.63-68
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• 1989

This paper discussed the Multi-PAM inverter for static power supply design. The controller part composed of one-chip microcomputer obtained control pattern simply. The configuration of termination part was composed of double bridge inverter and three-phase, three-winding transformer. The output waveforms using a controller and transformers synthesized the multi-PAM wave form by a voltage level of 22 steps per one-cycle. The output waveforms using the Low Pass Filter approximated to the sine wave.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1536-1539
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• 1987

This paper describes the method to extract CIF(Caltech Intermediate Form) by the digital image processing techniques from the VLSI chip. It is possible to represent to the layout editing system. The resolution of the image is 512 512 and 12 bits.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.1
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• pp.47-54
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• 2012

This paper presents implementation of SVPWM technique for three phase Voltage Source Inverter using FPGA. Software-based vector-control calculations much this drawback, in order to improve the hardware-vector-control tries. Without the need for additional software, vector control algorithm is designed to be modular SOPC, and DSP will reduce most of the operations. In this paper, the SVPWM that using HDL for the AC motor vector control algorithm level, and the dead time part and the speed control in order to controled a speed detector and designed in the form of modules. Then ALTERA corporation Cyclone III series EP3C16F484 can be verified by implemented.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.451-454
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• 2002

In this paper, studied on the one-chip design of low cost for the micro-stepping drive having 5-phase Pentagon Type winding. Micro-stepping method in order to eliminate effectively the resonant phenomena and to Increase the positional resolution. This paper proposed trapezoidal current wave- form for current control and provided design- method by using only one-chip of low cost. Therefore the drive will be simple and small size. Also the drive will have a lot of advantage at commercial business. Finally the above study has been implemented on the VHDL. Simulation has been performed to verify the PWM for micro-stepping drive.

• Journal of Sensor Science and Technology
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• v.8 no.6
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• pp.469-475
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• 1999

The chips may be produced in the form of either broken chips or unbroken chips in turning process. The unbroken chips are dangerous to the operator and difficult to handle at high speed machining. The signal of Acoustic Emission is related to cutting conditions, tool materials, test conditions and tool geometry in turning. The relationship between AE signal and chip formation was experimentally investigated. The experimental results show that two types of chip formations are possible to classify from the statistical analysis of the amplitude of AE signal. The AE-sensor could be used to monitor the chip condition in turning.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.11
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• pp.874-878
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• 2001

Solder bump was electroplated on wafer for flip chip application. The process is as follows. Ti/Cu were sputtered and thick PR was formed by several coating PR layer. Fine pitch vias were opened using via mask and then Cu stud and solder bump were electroplated. Finally solder bump was formed by reflow process. In this paper, we opened 40㎛ vias on 57㎛ thick PR layer and electroplated solder bump with 70㎛ height and 40㎛ diameter. After reflow process, we could form solder bump with 53㎛ height and 43㎛ diameter. In plating process, we improved the plating uniformity within 3% by using ring contact instead of conventional multi-point contact.