• Title/Summary/Keyword: channel decoder

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The Implementation of MAP decoder for Turbo codes (터보 부호를 위한 MAP 복호기의 구현)

  • Lee, Jung-Won;Kim, Jong-Tae
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3148-3150
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    • 2000
  • Turbo codes that have attracted a great attention in recent years are applied to wireless communication networks that require variable quality of service and transmit over unknown fading channel. A MAP decoder is the constituent of turbo decoder. In this paper, we propose a high speed architecture of MAP decoder and a new normalization technique, In conclusion, this paper presents the efficient implementation of serial block MAP decoder for turbo codes.

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Design of High Rate Turbo Code for PR4 Channel (PR4 channel에서의 High Rate Turbo Code의 설계)

  • 변남균;김종태
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.297-300
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    • 2001
  • Turbo code shows the great performance near Shannon limit on AWGN channel. Mainly, turbo code has been studied and designed for wireless digital communications. There are recent studies that applies turbo decoder on magnetic recording. Because of the limited capacity of magnetic storages, high rate turbo code is used for magnetic storages. This paper presents some issues on implementing high rate turbo code and structures for designing turbo decoder

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Implementation of Channel Coding System using Viterbi Decoder of Pipeline-based Multi-Window (파이프라인 기반 다중윈도방식의 비터비 디코더를 이용한 채널 코딩 시스템의 구현)

  • Seo Young-Ho;Kim Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.587-594
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    • 2005
  • In the paper, after we propose a viterbi decoder which has multiple buffering and parallel processing decoding scheme through expanding time-divided imput signal, and map a FPGA, we implement a channel coding system together with PC-based software. Continuous input signal is buffered as order of decoding length and is parallel decoded using a high speed cell for viterbi decoding. Output data rate increases linearly with the cell formed the viterbi decoder, and flexible operation can be satisfied by programming controller and modifying input buffer. The tell for viterbi decoder consists of HD block for calculating hamming distance, CM block for calculating value in each state, TB block for trace-back operation, and LIFO. The implemented cell of viterbi decoder used 351 LAB(Logic Arrary Block) and stably operated in maximum 139MHz in APEX20KC EP20K600CB652-7 FPGA of ALTERA. The whole viterbi decoder including viterbi decoding cells, input/output buffers, and a controller occupied the hardware resource of $23\%$ and has the output data rate of 1Gbps.

A Pilot Symbol Based Coherent QAM Decoder for a Wireless Channel (파일럿 패턴을 이용한 무선 QAM 송수신 기술 연구)

  • Kim, Han-Il;Han, Jae-Choong
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.50 no.8
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    • pp.400-405
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    • 2001
  • Quadrature Amplitude Modulation(QAM) is well known a bandwidth efficient modulation scheme. However, its use for mobile communications has been limited due to noise and signal distortion. Recently, the QAM scheme is emerging as a new modulation scheme for a band-limited wireless system. In this paper, we propose an iterative decoding algorithm assuming QAM signal for a narrow-band mobile channel. The Algorithm is based on the EM(Expectation Maximization) Algorithm, and the performances of the proposed decoder are assessed using computer simulation. The simulation results show that the proposed decoder perform better compared to that of other schemes.

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Performance Analysis and High-Speed Design of PSS-type Viterbi Algorithm in Gaussan and Burst Noise Channel (가우시안 및 버스트성 잡음채널에서의 PSS 방식 Viterbi Algorithm 성능분석과 고속 설계)

  • Yang, Hyeong-Gyu;Jeong, Ji-Won
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.6
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    • pp.1923-1931
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    • 2000
  • In this paper, e analyze the performance of the PSS-type Viterbi decoder which can reduce calculations and power consumption using the Monte Carlo simulations. Gaussian and burst noise channels are considered in this simulation, and we achieve that convolutional interleaver can reduce complexity and power consumption in burst noise channel. In order to implement the high-speed PSS-type Viterbi decoder, the architectures of decoder are presented, and we implemented the PSS-type Viterbi decoder for r=1/2, k=3 using the VHDL tool, and prove the decoding process.

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A Study on TCM Decoder Performance for 8 PSK, 8 PAM, 16 QAM in the Communication Channel With additive Gaussian and Impulsive Noise (가우스성 잡음과 임펄스성 잡음이 혼재하는 통신 채널 상에서 8 PSK, 8PAM, 16 QAM 에 대한 TCM 복호기 성능에 관한 연구)

  • 정지원;김경신;원동호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.9
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    • pp.18-25
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    • 1994
  • Previously. TCM decoder has been using the Viterbi algorithm that was complex. In order to reduce the complexity of decoder. we proposed the “modified decoding algorithm using the path back method” and the modified decoding algorithm which extends the previous decoding algorithm to be able to applied to TCM decoder in this paper. On the gaussian and impulsive noise channel. Monte-Carlo simulation is used for analyzing the TCM performance and proving the efficiency of proposed decoding algorithm.

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Performance of LDPC with Message-Passing Channel Detector for Perpendicular Magnetic Recording Channel (수직자기기록 채널에서 LDPC를 이용한 메시지 전달 방식의 채널 검출 성능비교)

  • Park, Dong-Hyuk;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.4C
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    • pp.299-304
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    • 2008
  • For perpendicular magnetic recording channels, it is hard to expect improving the performance by using the PRML or NPML. Hence, we exploit LDPC code to improve the performance. In this paper, we examine a single message-passing detector/decoder matched to the combination of a perpendicular magnetic recording channel detector and an LDPC code decoder. We examine the performance of channel iteration with joint LDPC code on perpendicular magnetic recording channel, and simplify the complexity of the message-passing detector algorithm.

Precoding Method for Increasing System Capacity in Multiuser MIMO Downlink Channels (다중사용자 MIMO 하향링크 채널 환경에서 시스템 용량 향상을 위한 프리코딩 기법)

  • Kim, Kwang-Yoon;Lee, Jong-Sik;Koo, Sung-Wan;Yang, Jea-Su;Kim, Jin-Young
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.12-16
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    • 2008
  • In this paper, we study precoding techniques for co-channel interference suppression in multiuser MIMO systems. DPC is optimal techniques to achieve the system capacity of multiuser MIMO downlink channels. DPC is not proper in practical wireless systems because complexity is very high. So block diagonal precoding for multiuser MIMO downlink channel is studied. The block diagonal precoding is used to suppress co-channel interference between multiuser. Block diagonal precoding method, whose complexity is reduced by modified null space operation, change multiuser MIMO channel to multiple single-user MIMO channel. We also use V-BLAST decoder in receiver. V-BLAST decoder can achieve increased system capacity in proportion to the number of users. We show improved system performance by using computer simulation.

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The adaptive reduced state sequence estimation receiver for multipath fading channels (이동통신 환경에서 적응상태 축약 심볼열 추정 수신기)

  • 이영조;권성락;문태현;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.7
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    • pp.1468-1476
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    • 1997
  • In mobile communication systems, the Reduced State Sequence Estimation(RSSE) receiver must be able to track changes in the channel. This is carried out by the adaptive channel estimator. However, when the tentative decisions are used in the channel estimator, incorrect decisions can cause error propagation. This paper presents a new channel estimator using the path history in the Viterbi decoder for preventing error propagation. The selection of the path history in the Viterbi decoder for preventing error propagation. The selection of the path history for the channel estimator depends on the path metric as in the decoding of the Viterbi decoder in RSSE. And a discussion on the channel estimator with different adaptation algorithms such as Least Mean Square(LMS) algorithm and Recursive Least Square(RLS) algorithm is provided. Results from computer simulations show that the RSSE receivers using the proposed channel estimator have better performance than the other conventional RSSE receiver, and that the channel estimator with RLS algorithm is adequate for multipath fading channel.

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Realization of Forward Real-time Decoder using Sliding-Window with decoding length of 6 (복호길이 6인 Sliding-Window를 적용한 순방향 실시간 복호기 구현)

  • Park Ji woong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.4C
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    • pp.185-190
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    • 2005
  • In IS-95 and IMT-2000 systems using variable code rates and constraint lengths, this paper limits code rate 1/2 and constraint length 3 and realizes forward real-time decoder using Sliding-Window with decoding length 6 and PVSL(Prototype Vector Selecting Logic), LVQ(Learning Vector Quantization) in Neural Network. In comparison condition to theoretically constrained AWGN channel environment at $S/(N_{0}/2)=1$ I verified the superiority of forward real-time decoder through hard-decision and soft-decision comparison between Viterbi decoder and forward real-time decoder such as BER and Secure Communication and H/W Structure.