• Current Research on Agriculture and Life Sciences
• /
• v.30 no.1
• /
• pp.1-11
• /
• 2012

We identified cdf based on screening of the Arabidopsis cDNA library for functional suppressors of the AtBI-1 (a gene described to suppress the cell death induced by Bax gene expression in yeast). The cdf was located on Chr. V and was composed of 5 exons and 4 introns. It encodes a protein of 258 amino acid residues with a molecular weight of 28.8 kDa. The protein has 3 transmembrane domains in the C-terminal region. The cdf has one homologue, named cdf2, which was found in Arabidopsis. Like cdf, cdf2 also induced growth defect in yeast. The effect of the cell growth defect factor was somewhat lower than Bax. cdf could arrest the growth of yeast. Its localization to the nucleus was essential for the suppression of yeast cell proliferation. Morphological abnormality of intracellular network, which is a hallmark of AtBI-1, was attenuated by expression of cdf.

• Journal of Microbiology and Biotechnology
• /
• v.22 no.5
• /
• pp.600-606
• /
• 2012

Studies into the cell death program termed apoptosis have resulted in new information regarding how cells control and execute their own demise, including insights into the mechanism by which death-preventing factors can inhibit Bax-induced caspase activation. We investigated high temperature stress-induced cell death in Brassica rapa. Using a yeast functional screening from a Brassica rapa cDNA library, the BH5-127 EST clone encoding an apoptotic suppressor peptide was identified. However, a phylogenic tree showed that BH5-127 clusters within a clade containing SUMO-1 (Small Ubiquitin-like Modifier-1). BH5-127 was confirmed similar to have function to SUMO-1 as Fas suppression. Expression of BH5-127 showed that substantial suppression of cell death survived on SD-galactose-$Leu^-$-$Ura^-$ medium. The results suggest that BrSE ($\underline{B}$rassica rapa $\underline{S}$entrin $\underline{E}$ST, BH5-127) is one of the important regulatory proteins in programming cell death, especially in the seedling stage of Chinese cabbage.

• Journal of Information Processing Systems
• /
• v.15 no.6
• /
• pp.1326-1334
• /
• 2019

Knowledge base means a library stored in computer system providing useful information or appropriate solutions to specific area. Knowledge base associated with autism is the complex multidimensional information set related to the disease autism for its pathogenic factor and therapy. This paper focuses on the knowledge of biological molecular information extracted from massive biomedical texts with the aid of widespread used machine learning methods. Six classes of biological molecular information (such as protein, DNA, RNA, cell line, cell component, and cell type) are concerned and the probability statistics method, conditional random fields (CRFs), is utilized to discover these knowledges in this work. The knowledge base can help biologists to etiological analysis and pharmacists to drug development, which can at least answer four questions in question-answering (QA) system, i.e., which proteins are most related to the disease autism, which DNAs play important role to the development of autism, which cell types have the correlation to autism and which cell components participate the process to autism. The work can be visited by the address http://134.175.110.97/bioinfo/index.jsp.

• Proceedings of the IEEK Conference
• /
• 2000.06b
• /
• pp.221-225
• /
• 2000

We designed asynchronous event logic library with 0.25$\mu\textrm{m}$ CMOS technology and interface chip for heterogeneous system with high-speed asynchronous FIFO operating at 1.6㎓. Optimized asynchronous standard cell layouts and Verilog models are designed for top-down design methodology. A method for mitigating a design bottleneck when it comes to tolerate clock skew is described. This communication scheme using clock control circuits, which is used for the free of synchronization failures, is analyzed and implemented. With clock control circuit and FIFO, high-speed communication between synchronous modules operating at different clock frequencies or with asynchronous modules is performed. The core size of implemented high-speed 32bit-interface chip for heterogeneous system is about 1.1mm ${\times}$ 1.1mm.

• Proceedings of the KSAR Conference
• /
• 2004.06a
• /
• pp.195-195
• /
• 2004

To discover germ cell-specific transcripts, we prepared a cDNA library from adult testes of 35-day old mice and subtracted it with mRNA from the testes of juvenile mice. Real-time RT-PCR analysis indicated that 42 cDNA clones in the subtracted library were expressed more intensely in the adult testes than in the juvenile testes. One clone identified by subtraction is expressed preferentially in the late spermatid and is located on chromosome 17E3 in mouse and 2p22 in human. (omitted)

• Proceedings of the KIEE Conference
• /
• 2009.04a
• /
• pp.163-165
• /
• 2009

Many photovoltaic (PV) systems are being developed and installed. For a PV developer, simulations are required before the experimental testing. However, most simulation tools do not offer data libraries for PV systems, so that some Institutes who try to use such software will be in difficulty. In this paper, simulations of performance and stability have been carried out using the software PSPICE. In this paper, the modelling of solar cell arrays, photovoltaic modules, PV generators, batteries and drive systems is carried out based on mathematical equivalence circuits and available data, and the models are converted into a data library for PSPICE that is user friendly. System variations can be modeled by simple parameter variation. To verify the accuracy of the simulation library, various models were run and compared to known systems.

• Proceedings of the IEEK Conference
• /
• 2000.07a
• /
• pp.379-382
• /
• 2000

We designed a self-timed interface circuit for efficient communication in IP (Intellectual Property)-based system with high-speed self-timed FIFO and a set of self-timed event logic library with 0.25um CMOS technology. Optimized self-timed standard cell layouts and Verilog models are generated for top-down design methodology. A method for mitigating a design bottleneck when it comes to tolerate clock skew is described. With clock control method and FIFO, we implemented high-speed 32bit-interface chip for self-timed system, which generated maximum system clock is 2.2GHz. The size of the core is about 1.1mm x 1.1mm.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.29A no.9
• /
• pp.76-84
• /
• 1992

The DSP silicon compiler consists of language compiler, module generator, placement tool, router, layout generation tools, and simulator. In this paper, The language compiler, the module generator, placement tool, and simulator were developed and provided for the system designer. The language compiler translates the designer's system description language into the intermediate form file. The intermediate form file expresses the interconnections and specifications of the cells in the cell library. The simulator was developed and provided for the behavioral verification of the DSP system. For its implementation, the event-driven technique and the C$^{++}$ task library was used. The module generator was developed for the layout of the verified DSP system, and generates the functional block to be used in the DSP chip. And then the placement tool determines the appropriate positions of the cells in the DSP chip. In this paper, the placement tool was implemented by Min-Cut and Simulated Annealing algorithm. The placement process can be controlled by the several conditions input by the system designer.

• ETRI Journal
• /
• v.25 no.5
• /
• pp.337-344
• /
• 2003

In this paper, we introduce a fully synthesizable 32-bit embedded microprocessor core called the AE32000B. The AE32000B core is based on the extendable instruction set computer architecture, so it has high code density and a low memory access rate. In order to improve the performance of the core, we developed and adopted various design options, including the load extension register instruction (LERI) folding unit, a high performance multiply and accumulate (MAC) unit, various DSP units, and an efficient coprocessor interface. The instructions per cycle count of the Dhrystone 2.1 benchmark for the designed core is about 0.86. We verified the synthesizability and the area and time performances of our design using two CMOS standard cell libraries: a 0.35-${\mu}m$ library and a 0.18-${\mu}m$ library. With the 0.35-${\mu}m$ library, the core can be synthesized with about 47,000 gates and operate at 70 MHz or higher, while it can be synthesized with about 53,000 gates and operate at 120 MHz or higher with the 0.18-${\mu}m$ library.

• Bulletin of the Korean Chemical Society
• /
• v.35 no.8
• /
• pp.2385-2390
• /
• 2014

Novel 2,6-difuctionalized 2H-benzopyrans were synthesized and evaluated for a sphingosylphosphorylcholine(SPC) inhibitor. The synthetic 2H-benzopyrans 1c and 3a showed high potency in SPC-induced cell proliferation assay ($IC_{50}$ < 20 nM). Neither hERG $K^+$ channel binding (> $10{\mu}M$) nor CYP inhibitions (> $10{\mu}M$) were observed. Also, the simple structure-activity relationship (SAR) results were obtained from analysis of 2H-benzopyran derivatives 1-3 and the anti-SPC effect of 2H-benzopyran 1c was confirmed by a HUVEC tube formation assay.