• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3256-3264
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• 1996

This paper presents an efficient VLSI architecture for transposing matris in high speed. In the case of transposing N*N matrix, N$^{2}$ numbers of transposition cells are configured as regular and spuare shaped structure, and pipeline structure for operating each transposition cell in paralle. Transposition cell consists of register and input data selector. The characteristic of this architecture is that the data to be transposed are divided into several bundles of bits, then processed serially. Using the serial transposition of divided input data, hardware complexity of transpositioncell can be reduced, and routing between adjacent transposition cells can be simple. the proposed architecture is designed and implemented with 0.5 .mu.m VLSI library. As a result, it shows stable operation in 200 MHz and less hardware complexity than conventional architectures.

• Journal of Microbiology
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• v.34 no.4
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• pp.311-315
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• 1996

The retroviral Gag polyprotein directs the assembly of virion particles and plays an important role in some events after entry into a host cell. The Gag polyprotein of a virus mixture is responsible for inducing murine acquired immunodeficiency syndrome (MAIDS) when injected into susceptible strains of mice. In order to identify the host cellular proteins which interact with the MAIDS virus Gag proteins and possibly mediate the function of the Gag proteins, mouse T-cell leukemic cDNA expression library was screened using the yeast GAL4 two hybrid system. Of 11 individual positive clones, the clone Y1 was selected for the study of protein-protein interaction. Its DNA sequence revealed that it was an exact match to the murine SH3 domain-containing protein SH3P8. It is expressed as 2.4 kbp transcripts in testis at higher levels and in various tissues tested at lower levels. Glutathione S-transferase-Y1 fusion protein binds tightly to $Pr60^{def-gag}$ as well as $Pr65^{eco-gag}$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.6
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• pp.1503-1513
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• 1998

This paper is related to a performance analysis of B-NT system, which is essential compositional equipment of B-ISDN access network. A simulator enabling performance analysis according to the change of network configuration topology and the change of user traffic is developed in this study. The developed B-NT, system simulator consists of graphic user interface module, simulation program automatic generator module, and B-NT system model library module. As examples of the results of performance analysis using the simulator, end-to-end user cell transmission delay time, queueing delay time in each system, and cell loss rate in the head node switch are presented. The simulator developed in this paper can be utilized in determining the network topology of B-NT system.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.11
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• pp.132-139
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• 1993

This paper presents a new performance-driven multi-levelizer which transforms a two-level description into a boolean network of the multilevel structure satisfied with user's costraints, such as chip area, the number of wires and literals, maximum delay, function level, fanin, fanout, etc.. The performance of circuits is estimated by reference to the informations in cell library through the cell mapping phase, and multi-levelization of circuits is constructed by the decomposition using the kernel and factoring concepts. Here, the saving cost of a common subexpression is defined to the sum of area and delay saved, when it is substituted. The experiments with MCNC benchmarks show the efficiency of the proposed method.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.612-614
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• 1998

As chip feature size decrease, interconnect delay gains more importance. A accurate timing analysis required to estimate interconnect delay as well as cell delay. In this paper, we present a timing-level delay calculation tool of which the accuracy is bounded within 10% of SPICE results. This delay calculation tool generates delay values in SDF(Standard Delay Format) for parasitic data extracted in SPEF(Standard Parasitic Exchange Format). The efficiency of the tool is easily seen because it uses AWE(Asymptotic Waveform Evaluation) algorithm for interconnect delay calculation, and precharacterized library and effective capacitance model for cell delay calculation.

• Journal of Microbiology and Biotechnology
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• v.18 no.5
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• pp.926-932
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• 2008

Human heavy chain (H-) and light chain (L-) ferritins were amplified from a human cDNA library. Each ferritin gene was inserted downstream of the T7 promoter of bacterial expression vectors, and two types of coexpression vectors were constructed. The expression levels of recombinant ferritins ranged about 26-36% of whole-cell protein. H-ferritin exhibited a lower expression ratio compared with L-ferritin, by a coexpression system. However, the coexpression of HL-ferritins was significantly increased above the expression ratio of H-ferritin by cultivation without IPTG induction overnight. Purified recombinant H-, L-, HL-, and LH-ferritins were shown to be homo- and heteropolymeric high molecular complexes and it was indicated that their assembled subunits would be able to work functionally in the cell. Thus, these results indicate an improvement in the expression strategy of H-ferritin for heteropolymeric production and studies of ferritin assembly in Escherichia coli.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2008.03a
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• pp.597-601
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• 2008

Three-dimensional structures of detonation wave propagating in circular tube were investigated. Inviscid fluid dynamics equations coupled with a conservation equation of reaction progress variable were analyzed by a MUSCL-type TVD scheme and four stage Runge-Kutta time integration. Variable-$\gamma$ formulation was used to account for the variable properties between unburned and burned states and the chemical reaction was modeled by using a simplified one-step irreversible kinetics model. The computational code was parallelized based on domain decomposition technique using MPI-II message passing library. The computations were carried out using a home made Windows based PC cluster having 160 AMD AthloxXP and Athlon64 processor. The computational domain consisted of through a roundshaped tube with wall conditions. As an initial condition, analytical ZND solution was distributed over the computational domain with disturbances. The disturbances has circumferential large gradient. The unsteady computational results in three-dimension show the detailed mechanisms of multi-cell mode of detonation wave instabilities resulting diamond shape in smoked-foil record.

• Proceedings of the PSK Conference
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• 2002.10a
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• pp.326.1-326.1
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• 2002

We applied serological analysis of cDNA expression library technique to identify cancer-associated genes. We screened cDNA expression libraries of human testis and gastric cancer cell lines with sera of patients with gastric cancers. We identified a gene whose expression is testis-specific among normal tissues. We cloned and characterized this novel gene. It contains D-E-A-D box domain and encodes a putative protein of 630 amino acids with possible helicase activity. It showed wide expression in various cancer tissues and cancer cell lines. (omitted)

• Proceedings of the Korean Society of Developmental Biology Conference
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• 2003.10a
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• pp.121-121
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• 2003

The standard protocol for the production of transgenic mouse from ES-injected embryo has to process via chimera producing and several times breeding steps, In contrast, tetraploid-ES cell complementation method allows the immediate generation of targeted murine mutants from genetically modified ES cell clones. The advantage of this advanced technique is a simple and efficient without chimeric intermediates. Recently, this method has been significantly improved through the discovery that ES cells derived from hybrid strains support the development of viable ES mice more efficiently than inbred ES cells do. Therefore, the objective of this study was to generate transgenic mice overexpressing human resistin gene by using tetrapioid-ES cell complementation method. Human resistin gene was amplified from human fetal liver cDNA library by PCR and cloned into pCR 2.1 TOPO T-vector and constructed in pCMV-Tag4C vector. Human resistin mammalian expression plasmid was transfected into D3-GL ES cells by lipofectamine 2000, and then after 8~10 days of transfection, the human resistin-expressing cells were selected with G418. In order to produce tetraploid embryos, blastomeres of diploid embryos at the two-cell stage were fused with two times of electric pulse using 60 V 30 $\mu$sec. (fusion rate : 93.5%) and cultured upto the blastocyst stage (development rate : 94.6%). The 15~20 previously G418-selected ES cells were injected into tetraploid blastocysts, and then transferred into the uterus of E2.5d pseudopregnant recipient mice. To investigate the gestation progress, two El9.5d fetus were recovered by Casarean section and one fetus was confirmed to contain human resistin gene by genomic DNA-PCR. Therefore, this finding demonstrates that tetraploid-ES mouse technology can be considered as a useful tool to produce transgenic mouse for the rapid analysis of gene function in vivo.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.11C
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• pp.662-672
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• 2011

This paper presents a new edge-preserving algorithm and its VLSI architecture for block artifact reduction. Unlike previous approaches using block classification, our algorithm utilizes pixel classification to categorize each pixel into one of two classes, namely smooth region and edge region, which are described by the edge-preserving maps. Based on these maps, a two-step adaptive filter which includes offset filtering and edge-preserving filtering is used to remove block artifacts. A pipelined VLSI architecture of the proposed deblocking algorithm for HD video processing is also presented in this paper. A memory-reduced architecture for a block buffer is used to optimize memory usage. The architecture of the proposed deblocking filter is prototyped on FPGA Cyclone II, and then we estimated performance when the filter is synthesized on ANAM 0.25 ${\mu}m$ CMOS cell library using Synopsys Design Compiler. Our experimental results show that our proposed algorithm effectively reduces block artifacts while preserving the details.