• 제목/요약/키워드: capacitance scaling

검색결과 28건 처리시간 0.029초

BICMOS 버퍼의 해석적 지연시간 모델링 (Analytical Delay-Time Modeling of BICMOS Buffere)

  • 이희덕;조인성;한철희
    • 전자공학회논문지B
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    • 제30B권1호
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    • pp.38-44
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    • 1993
  • A model for BICMOS buffer switching operation is presented, including the influence of bipolar base transit time and collector-base capacitances. A closed-form solution for the propagation delay-time is obtained assuming low level injection and channel velocity limitation. For the high level injection case, the delay-times are numerically obtained using effective current gain. These results are compared with those by HSPICE simulation, which shows good agreement. It is noted that the collector-base capacitance strongly affects the delay-time. The effects of voltage scaling are also investigated, which shows the model can be applied for the reduced supply voltages.

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${\delta}$ - 도핑 NMOSFET 채널 내에서의 양자화 효과 (Quantum Effects in the channel of a ${\delta}$ - doped NMOSFET)

  • 문현기;김현중;이찬호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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    • pp.177-180
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    • 2001
  • The quantum effects in the channel of a $\delta$ -doped NMOSFET structures are investigated by solving Schrodinger and Poisson equations self-consistently. According to the scaling of MOSFET structures, electron distributions change by the strong energy quantization. However the presence of a low-doped epitaxial region produces a reduction of the electron effective field for a given charge sheet density and therefore, improves the electron effective mobility. We also focus the quantum-induced threshold voltage shifts, low-field electron effective mobility and gate-to-channel capacitance. The reported results give indications for the fabrication of ultra short MOSFET's.

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ICP-CVD 반응기 내에서 $N_2O$ 플라즈마 산화법을 이용하여 증착된 ultra thin silicon oxynitride films 에 관한 연구 (Study on the ultra thin film of silicon oxyinitride deposited by plasma - assisted $N_2O$ oxidation in ICP-CVD reactor)

  • 황성현;정성욱;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.161-162
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    • 2006
  • Scaling rules for TFT application devices have led to the necessity of ultra thin dielectric films and high-k dielectric layers. In this paper, The advantages of high concentration of nitrogen in silicon oxide layer deposited by using $N_2O$ in Inductively Coupled Plasma Chemical Vapor Deposition (ICP-CVD) reported about Ellipsometric measurement, Capacitance-Voltage characterization and processing conditions.

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스케일링이 가능한 AlGaN/GaN HEMT 소자의 열 모델에 관한 연구 (Scalable AlGaN/GaN HEMTGs Model Including Thermal Effect)

  • 김동기;김성호;오재응;권영우
    • 한국전자파학회논문지
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    • 제14권7호
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    • pp.705-711
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    • 2003
  • 본 연구에서는 고출력 소자로서 각광받고 있는 AlGaN/GaN HEMT 2$\times$100 $\mu\textrm{m}$ 소자(사파이어 기판)에 대해 열 효과가 포함된 대신호 모델링을 수행하였다. 완성된 대신호 모델을 이용하여 9 mm, 15 mm 사이즈 소자로의 스케일링을 통해 전력증폭기를 설계하였으며 제작된 결과와 비교, 해석하였다. 대신호 모델링은 수렴성과 해석 속도면에서 탁월한 장점을 갖는 수식 기반의 경험적 방법을 사용하였다. Pulsed I-V 측정을 통하여 열모델의 가장 중요한 파라미터인 열 시상수 및 열 저항을 추출하였으며 이를 통하여 완벽한 열 모델 제작이 가능하였다. 제작된 전력증폭기 모듈의 측정결과와 비교를 통하여 본 연구에서 제안된 열 모델이 매우 정확함을 확인할 수 있으며 전력증폭기와 같이 큰 사이즈의 소자를 사용해야 하는 회로의 경우에는 열 효과가 포함된 모델을 사용하여 더욱 정확한 모델링 결과를 얻을 수 있음을 확인할 수 있다.

센서 및 통신 응용 핵심 소재 In0.8Ga0.2As HEMT 소자의 게이트 길이 스케일링 및 주파수 특성 개선 연구 (Gate length scaling behavior and improved frequency characteristics of In0.8Ga0.2As high-electron-mobility transistor, a core device for sensor and communication applications)

  • 조현빈;김대현
    • 센서학회지
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    • 제30권6호
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    • pp.436-440
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    • 2021
  • The impact of the gate length (Lg) on the DC and high-frequency characteristics of indium-rich In0.8Ga0.2As channel high-electron mobility transistors (HEMTs) on a 3-inch InP substrate was inverstigated. HEMTs with a source-to-drain spacing (LSD) of 0.8 ㎛ with different values of Lg ranging from 1 ㎛ to 19 nm were fabricated, and their DC and RF responses were measured and analyzed in detail. In addition, a T-shaped gate with a gate stem height as high as 200 nm was utilized to minimize the parasitic gate capacitance during device fabrication. The threshold voltage (VT) roll-off behavior against Lg was observed clearly, and the maximum transconductance (gm_max) improved as Lg scaled down to 19 nm. In particular, the device with an Lg of 19 nm with an LSD of 0.8 mm exhibited an excellent combination of DC and RF characteristics, such as a gm_max of 2.5 mS/㎛, On resistance (RON) of 261 Ω·㎛, current-gain cutoff frequency (fT) of 738 GHz, and maximum oscillation frequency (fmax) of 492 GHz. The results indicate that the reduction of Lg to 19 nm improves the DC and RF characteristics of InGaAs HEMTs, and a possible increase in the parasitic capacitance component, associated with T-shap, remains negligible in the device architecture.

Reduction of Leakage Current and Enhancement of Dielectric Properties of Rutile-TiO2 Film Deposited by Plasma-Enhanced Atomic Lay er Deposition

  • Su Min Eun;Ji Hyeon Hwang;Byung Joon Choi
    • 한국재료학회지
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    • 제34권6호
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    • pp.283-290
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    • 2024
  • The aggressive scaling of dynamic random-access memory capacitors has increased the need to maintain high capacitance despite the limited physical thickness of electrodes and dielectrics. This makes it essential to use high-k dielectric materials. TiO2 has a large dielectric constant, ranging from 30~75 in the anatase phase to 90~170 in rutile phase. However, it has significant leakage current due to low energy barriers for electron conduction, which is a critical drawback. Suppressing the leakage current while scaling to achieve an equivalent oxide thickness (EOT) below 0.5 nm is necessary to control the influence of interlayers on capacitor performance. For this, Pt and Ru, with their high work function, can be used instead of a conventional TiN substrate to increase the Schottky barrier height. Additionally, forming rutile-TiO2 on RuO2 with excellent lattice compatibility by epitaxial growth can minimize leakage current. Furthermore, plasma-enhanced atomic layer deposition (PEALD) can be used to deposit a uniform thin film with high density and low defects at low temperatures, to reduce the impact of interfacial reactions on electrical properties at high temperatures. In this study, TiO2 was deposited using PEALD, using substrates of Pt and Ru treated with rapid thermal annealing at 500 and 600 ℃, to compare structural, chemical, and electrical characteristics with reference to a TiN substrate. As a result, leakage current was suppressed to around 10-6 A/cm2 at 1 V, and an EOT at the 0.5 nm level was achieved.

MLC NAND 플래시 메모리의 셀 간 간섭현상 감소를 위한 등화기 알고리즘 (An Equalizing Algorithm for Cell-to-Cell Interference Reduction in MLC NAND Flash Memory)

  • 김두환;이상진;남기훈;김시호;조경록
    • 전기학회논문지
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    • 제59권6호
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    • pp.1095-1102
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    • 2010
  • This paper presents an equalizer reducing CCI(cell-to-cell interference) in MLC NAND flash memory. High growth of the flash memory market has been driven by two combined technological efforts that are an aggressive scaling technique which doubles the memory density every year and the introduction of MLC(multi level cell) technology. Therefore, the CCI is a critical factor which affects occurring data errors in cells. We introduced an equation of CCI model and designed an equalizer reducing CCI based on the proposed equation. In the model, we have been considered the floating gate capacitance coupling effect, the direct field effect, and programming methods of the MLC NAND flash memory. Also we design and verify the proposed equalizer using Matlab. As the simulation result, the error correction ratio of the equalizer shows about 20% under 20nm NAND process where the memory channel model has serious CCI.

Characterization of the ultra thin films of silicon oxynitride deposited by plasma-assisted $N_2O$ oxidation for thin film transistors

  • Hwang, Sung-Hyun;Jung, Sung-Wook;Kim, Hyun-Min;Kim, Jun-Sik;Jang, Kyung-Soo;Lee, Jeoung-In;Lee, Kwang-Soo;Jung, Won-June;Dhungel, S.K.;Ghosh, S.N.;Yi, J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.1462-1464
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    • 2006
  • Scaling rules for TFT application devices have led to the necessity of ultra thin dielectric films and high-k dielectric layers. In this paper, The advantages of high concentration of nitrogen in silicon oxide layer deposited by using $N_2O$ in Inductively Coupled Plasma Chemical Vapor Deposition (ICP-CVD) is investigated using X-ray energy dispersive spectroscopy (EDS). We have reported about Ellipsometric measurement, Capacitance - Voltage characterization and processing conditions.

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Improvement of skin barrier function using lipid mixture

  • Park, Won-Seok;Son, Eui-Dong;Nam, Gae-Won;Park, Jong-Ho
    • 대한화장품학회지
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    • 제27권1호
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    • pp.53-72
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    • 2001
  • Dry skin is caused mainly by the perturbation of stratum corneum lipids which affected by ageing, change of season, excess use of surfactant and the effect of disease like atopic dermatitis and psoriasis. Intercellular lipid structures in stratum corneum are responsible for the barrier function of mammalian skin. The major lipd classes that can be extracted from stratum corneum are ceramides, cholesterol and fatty acid, which make up approximately 50, 25, 10 percent of the stratum corneum lipid mass, respectively. Small amount of cholesterol sulfate, phospholipids, glycosylceramide and cholesterol esters are also present. Recent studies have shown that application of one or two these lipids to the perturbed skin delays barrier recovery; only equimolar mixtures allow normal recovery. We observed that barrier recovery rate was improved in hairless mouse by topical application of single neutral lipids (ceramide, free fatty acid, cholesterol) and lipid mixtures. Whereas the application of single lipid didn’t allows a significant enhancement comparing with normal barrier repair, the equimolar mixtures of 3 components(including synthetic pseudoceramide PC104) improved barrier repair, as assessed by the transepidermal water loss. At clinical study to the volunteers aged over sixty, skin dryness recuperated by the increase of moisture(capacitance) and the reduction of scaling. Utilization of physiologic lipid mixture containing natural ceramides or synthetic pseudoceramide could lead to new forms of topical therapy for the dryness and dermatoses(e.g., psoriasis, atopic dermatitis and irritant dermatitis).

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Sub-0.1㎛ MOSFET의 게이트전압 종속 캐리어 속도를 위한 정확한 RF 추출 방법 (Accurate RF Extraction Method for Gate Voltage-Dependent Carrier Velocity of Sub-0.1㎛ MOSFETs in the Saturation Region)

  • 이성현
    • 전자공학회논문지
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    • 제50권9호
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    • pp.55-59
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    • 2013
  • Sub-$0.1{\mu}m$로 스케일이 감소함에 따라 기생 저항 효과가 크게 발생되는 dc Ids 측정 데이터 없이 측정 S-파라미터로부터 얻어진 RF Ids를 사용하여 벌크 MOSFET의 포화영역에서 게이트 전압 종속 유효 캐리어 속도를 추출하는 새로운 방법이 개발되었다. 이 방법은 바이어스 종속 기생 게이트-소스 캐패시턴스와 유효 채널 길이의 복잡한 추출 없이 포화영역의 유효 캐리어 속도를 추출할 수 있게 한다. 이러한 RF 기술을 사용하여 벌크 포화 속도를 초과하는 전자 속도 overshoot 현상이 $0.065{\mu}m$ 게이트 길이의 벌크 N-MOSFET에서 관찰되었다.