• Proceedings of the KIPE Conference
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• 2009.11a
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• pp.219-221
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• 2009

태양전지 어레이(PV-array)로부터 발전되는 DC 전력을 AC로 변환시켜 계통으로 발전시키는 역할을 하는 태양광 발전 시스템용 PCS의 스위칭 회로 Topology로는 일반적으로 3상 풀브리지 회로가 사용된다. 이러한 3상 풀브리지 회로 시스템의 수명예측을 위해 DC link 단의 커패시터의 커패시턴스를 계산하여 커패시턴스의 감소정도를 이용하여 전체 시스템의 수명을 예측하게 된다. 이러한 커패시터의 상태를 추정하기 위해서는 시스템을 정지시킨 후 커패시터를 분리하여 커패시턴스를 측정하는 방법, 특정 주파수의 전류(일반적으로 저주파)를 주입하고 주입한 전류의 주파수에 해당하는 전류 및 전압을 검출하여 capacitance 연산하는 방식등이 이용된다. 시스템을 정지시킨 후 커패시터를 분리하여 커패시턴스를 측정하는 방법은 번거로우며, 전류 주입을 이용한 방식은 불필요한 고조파 전류가 계통으로 침투하는 단점을 가진다. 그러므로 본 연구에서는 모듈타입 PCS 이용시 계통으로 고조파 침투가 없는 비침투 커패시턴스 계산 알고리즘을 제안한다.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.4
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• pp.186-191
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• 2012

DC Bus Electrolytic capacitors have been widely used in power conversion system because they can achieve high capacitance and voltage ratings with volumetric efficiency and low cost. This type of capacitors have been traditionally used for filtering, voltage smoothing, by-pass and other many applications in power conversion circuits requiring a cost effective and volumetric efficiency components. Unfortunately, electrolytic capacitors are some of the weakest components in power electronic converter. Many papers have proposed different methods or algorithms to determinate the ESR and/or capacitance C for fault diagnosis of the electrolytic capacitor. However, both ESR and C vary with frequency and temperature. Accurate knowledge of both values at the capacitors operating conditions is essential to achieve the best reference data of fault judgement. According to parameter analysis, the capacitance increases with temperature and the ESR decreases. Higher frequencies make the ESR and C to decrease. Analysis results show that the proposed electrolytic capacitor parameter estimation technique can be applied to reference signal of capacitor diagnosis systems successfully.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.2
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• pp.111-116
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• 2016

This paper proposes a high-frequency (MHz) LLC resonant converter for a capacitor coupling wireless power transfer (CCWPT). The CCWPT uses electric field in the coupling capacitor between the transmitter and receiver electrodes with a dielectric layer. Given that capacitance is very small and the impedance is large, transferring power with a simple series resonance is difficult. Therefore, the high frequency (MHz) and high Q factor LLC converter is proposed to reduce the impedance of the coupling capacitance and to obtain a high output voltage. This paper deals with the operation analysis of the proposed LLC converter and a theoretical capacitance estimation. The operation and features of the proposed CCWPT LLC converter is verified with a 4.2 W prototype for charging mobile devices.

• Journal of Sensor Science and Technology
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• v.30 no.2
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• pp.88-93
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• 2021

In this paper, a folding sensor based on capacitance is proposed. The sensor was developed to sense the length and angle data for the milli-scale actuators without causing any interference to the actuating joints. For the sensing and testing the robotic joint with reducing the cost and complexity aspects of manufacturing, a simple composition was adopted. The sensor comprises a pair of copper tapes, papers, and wires. The complete sensing unit is constructed by bonding the tapes with the papers and soldering the wire to the copper parts. For accuracy, a teensy 4.0 board, which has a 12-bit ADC resolution, is employed. Furthermore, the sensed analog data is not translated into the unit of capacitance for accuracy; however, it is filtered using a low-pass filter and subsequently, a Butter-worth filter. The data obtained demonstrate a periodic waveform, which implies that the data are in good agreement with the hypothesis set prior to the experiments. Compared to other milli-scale sensors, this could be a better option for sensing the length and angle data for milliscale actuators.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.345-350
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• 2014

DC electrolytic capacitor is widely used in the power converter including PWM inverter, switching power supply and PFC Boost converter system because of its large capacitance, small size and low cost. In this paper, basic characteristics of DC electrolytic capacitor vs. frequency is presented and the real-time estimation scheme of ESR and capacitance based on the bandpass filtering is adopted to the single phase boost converter of uninterruptible power supply to diagnose its split dc-link capacitors. The feasibility of this real-time failure prediction monitoring system is verified by the computer simulation of the 5[kW] singe phase PFC half-bridge boost converter.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.603-605
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• 1998

In recent years, chip delay estimation has had an increasingly important impact on overall design technology. The analysis of the timing behavior of an ASIC should be based not only on the delay characteristics of gates and interconnect circuits but also on the interactions between them. This model plays an important role in our CAD system to analyze the ASIC timing characteristics accurately, together with two-dimensional gate delay table model, AWE algorithm and effective capacitance concept. In this paper, we present an efficient algorithm which accounts for series resistance by computing a reduced-order approximation for the driving-point admittance of an RC-tree and an effective capacitance equation that captures the complete waveform response accurately.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1005-1008
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• 2000

This paper presents a simple method to estimate short-circuit power dissipation and propagation delay for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain coupling capacitance. The macro model and its expressions estimating the delay of CMOS circuits, which is based on the current modeling expression, are also proposed after investigating the voltage waveforms at transistor output modes. It is shown through simulations that the proposed technique yields better accuracy than previous methods when signal transition time and/or load capacitance decreases, which is a characteristic of the present technological evolution.

• Proceedings of the Korea Information Processing Society Conference
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• 2017.04a
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• pp.885-888
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• 2017

In this paper, a new strategy for estimating building temperature based on the modified resistance capacitance (R - C) network thermal dynamic model is proposed. The proposed method gives accurate indoor temperature estimation using minimum variance finite impulse response filter. Our study is clarified by the experimental validation of the proposed indoor temperature estimation method. This experiment scenario environment is composed of a demand response (DR) server and home energy management system (HEMS) in a test bed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.10a
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• pp.25-28
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• 2000

In this paper, the technology for accelerating degradation & life estimation on the traction motor was introduced with the stator form-winding sample coils of the 200 Class insulation system The accelerative degradation was performed in 10 cycles, which were composed of thermal stress, fast rising surge voltage, vibration, water immersion and overvoltage applying. After aging of 10 cycles, condition diagnosis test such as insulation resistance & polarization index, capacitance & dielectric loss and partial discharge properties were investigated in the temperature range of $20{\sim}160^{\circ}C$. Relationship between degradation conditions and diagnosis results were analyzed to find an dominative degradation factor at the end-life point

• Journal of Electrical Engineering and Technology
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• v.3 no.4
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• pp.460-467
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• 2008

This paper presents a new numerical algorithm for the fault location estimation and arcing fault detection when a single-phase arcing ground fault occurs on a transmission line. The proposed algorithm derived in the spectrum domain is based on the synchronized voltage and current samples measured from the PMUs(Phasor Measurement Units) installed at both ends of the transmission lines. In this paper, the algorithm uses DFT(Discrete Fourier Transform) for estimation. The algorithm uses a short data window for real-time transmission line protection. Also, from the calculated arc voltage amplitude, a decision can be made whether the fault is permanent or transient. The proposed algorithm is tested through computer simulation to show its effectiveness.