• The KIPS Transactions:PartC
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• v.10C no.7
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• pp.879-884
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• 2003

Generally we use web cache in order to increase performance of web base system, and a replacement technique has a great influence on performance of web cache. A web cache replacement technique is different from a replacement technique of memory scope, and a unit substituted for is web object Also, as for the web object, a variation of user reference characteristics is very great. Therefore, a web cache replacement technique can reflect enough characteristics of this web object. But the existing web caching techniques were not able to reflect enough these object reference characteristics. A principal viewpoint of this study is reference characteristic analysis, an elevation of an object hit rate, an improvement of response time. First of all we analyzed a reference characteristics of an web object by log analysis. And we divide web cache storage scope using the result of reference characteristics analysis. In the experiment result, we can confirm that performance of an object-hit ratio and a response speed was improved than a conventional technique about a proposal technique.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.546-553
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• 2015

Recently, flash cache is widely adopted as the performance accelerator of legacy storage systems. Unlike other cache media, flash cache should be carefully managed as it has peculiar characteristics such as long write latency and limited P/E cycles. In particular, we make two prominent observations that can be utilized in managing flash cache. First, a serious worn-out problem happens when the working-set of a system is beyond the capacity of flash cache due to excessively frequent cache replacement. Second, more than 50% of data has no hit in flash cache as it is a second level cache. Based on these observations, we propose a cache admission control policy that does not cache data when it is first accessed, and inserts it into the cache only after its second access occurs within a certain time window. This allows the filtering of data disruptive to flash cache in terms of endurance and performance. With this policy, we prolong the lifetime of flash cache 2.3 times without any performance degradations.

• Journal of the Korea Society of Computer and Information
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• v.25 no.3
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• pp.11-17
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• 2020

In this paper, we propose practical results for cache replacement policy by measuring cache hit and search time for each replacement algorithm through cache simulation. Thus, the structure of each cache memory and the four types of alternative policies of FIFO, LFU, LRU and Random were implemented in software to analyze the characteristics of each technique. The paper experiment showed that the LRU algorithm showed hit rate and search time of 36.044% and 577.936ns in uniform distribution, 45.636% and 504.692ns in deflection distribution, while the FIFO algorithm showed similar performance to the LRU algorithm at 36.078% and 554.772ns in even distribution and 45.662% and 489.574ns in bias distribution. Then LFU followed, Random algorithm was measured at 30.042% and 622.866ns at even distribution, 36.36% at deflection distribution and 553.878ns at lowest performance. The LRU replacement method commonly used in cache memory has the complexity of implementation, but it is the most efficient alternative to conventional alternative algorithms, indicating that it is a reasonable alternative method considering the reference information of data.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.1
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• pp.128-136
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• 2008

In this paper, we propose a new cache structure for effective error correction of soft error. We added check bit and SEEB(soft error evaluation block) to evaluate the status of cache line. The SEEB stores result of parity check into the two-bit shit register and set the check bit to '1' when parity check fails twice in the same cache line. In this case the line where parity check fails twice is treated as a vulnerable to soft error. When the data is filled into the cache, the new replacement algorithm is suggested that it can only use the valid block determined by SEEB. This structure prohibits the vulnerable line from being used and contributes to efficient use of cache by the reuse of line where parity check fails only once can be reused. We tried to minimize the side effect of the proposed cache and the experimental results, using SPEC2000 benchmark, showed 3% degradation in hit rate, 15% timing overhead because of parity logic and 2.7% area overhead. But it can be considered as trivial for SEEB because almost tolerant design inevitably adopt this parity method even if there are some overhead. And if only parity logic is used then it can have $5%{\sim}10%$ advantage than ECC logic. By using this proposed cache, the system will be protected from the threat of soft error in cache and the hit rate can be maintained to the level without soft error in the cache.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.80-90
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• 2016

Thanks to superior leakage energy efficiency compared to SRAM cells, STTRAM cells are considered as a promising alternative for a memory element in on-chip caches. However, the main disadvantage of STTRAM cells is high write energy and latency. In this paper, we propose a low-cost write filter (WF) cache which resides between the load/store queue and STTRAM-based L1 data cache. To maximize efficiency of the WF cache, the line allocation and access policies are optimized for reducing energy consumption of STTRAM-based L1 data cache. By efficiently filtering the write operations in the STTRAM-based L1 data cache, our proposed WF cache reduces energy consumption of the STTRAM-based L1 data cache by up to 43.0% compared to the case without the WF cache. In addition, thanks to the fast hit latency of the WF cache, it slightly improves performance by 0.2%.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2785-2792
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• 2011

Such problems as delay, congestion, and crosstalk in the proxy system degrade not only QoS (Quality of Service) but responsiveness and reliability of the streaming media service. To solve this problem this paper proposed a FRTP (Fuzzy Relevance-based Transcoding Proxy) mechanism. The proposed FRTP mechanism analyzes fuzzy similarity for partitioned segment versions of media objects to create a FRTG (Fuzzy Relevance-based Transcoding Graph). Created FRTG determines the transcoding for partitioned media object segment versions. Determined transcoding improves DSR (Delay Saving Ratios), CHPR (Cache Hit Precision Ratio), and CHRR (Cache Hit Recall Ratio). The proposed mechanism is simulated to evaluate such performance parameters as DSR, CHPR, and CHRR. Simulation results shows that the proposed mechanism outperforms in DSR, CHPR and CHRR compared with the other existing mechanisms.

• The Journal of the Korea Contents Association
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• v.10 no.3
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• pp.64-71
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• 2010

Recently, to achieve high performance of the processor, the cache is splits physically into two parts, one for instruction and one for data. This paper proposes an architecture of asynchronous instruction cache based on mixed-delay model that are DI(delay-insensitive) model for cache hit and Bundled delay model for cache miss. We synthesized the instruction cache at gate-level and constructed a test platform with 32-bit embedded processor EISC to evaluate performance. The cache communicates with the main memory and CPU using 4-phase hand-shake protocol. It has a 8-KB, 4-way set associative memory that employs Pseudo-LRU replacement algorithm. As the results, the designed cache shows 99% cache hit ratio and reduced latency to 68% tested on the platform with MI bench mark programs.

• Journal of KIISE:Software and Applications
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• v.30 no.7_8
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• pp.780-791
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• 2003

Caching is a useful technique to improve the response time by reducing contention of requests in mobile computing environments with a narrow bandwidth. in the traditional cache-based systems, to improve the hit ratio has been usually one of main concerns for the time. However, in mobile computing environments, it is necessary to consider the cost of cache miss as well as the hit ratio. In this paper, we propose a new cache replacement strategy in pull-based data dissemination systems. Then, we evaluate performance of the proposed strategy by a simulation approach. The proposed strategy considers both the popularity and the wating time together, so the page with the smallest value of multiplying popularity by waiting time is selected as a victim.

• Journal of the Korea Society of Computer and Information
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• v.22 no.7
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• pp.1-7
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• 2017

As the capacity of NAND flash module increases, the amount of RAM increases for caching and maintaining the FTL mapping information. In order to reduce the amount of mapping information managed in the RAM, a demand-based address mapping method stores the entire mapping information in the flash and some valid mapping information in the form of cache in the RAM so that the RAM can be used efficiently. However, when cache miss occurs, it is necessary to read the mapping information recorded in the flash, so overhead occurs to translate the address. If the RAM space is not enough, the cache hit ratio decreases, resulting in greater overhead. In this paper, we propose a method using two tables called TPMT(Translation Page Mapping Table) and SMT(Segmented Translation Page Mapping Table) to utilize both temporal locality and spatial locality more efficiently. A performance evaluation shows that this method can improve the cache hit ratio by up to 30% and reduces the extra translation operations by up to 72%, compared to the TPM scheme.

• KIPS Transactions on Computer and Communication Systems
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• v.9 no.3
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• pp.59-66
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• 2020

Content Centric Network(CCN) with architecture that is completely different from traditional host-based networks has emerged to address problems such as the explosion of traffic load in the current network. Research on cache replacement policies is very active to improve the performance of CCN with the characteristics that all routers cache on the network. Therefore, this paper proposes a cache replacement policy suitable for situations in which popularity is constantly changing, taking into account the actual network situation. In order to evaluate the performance of the proposed algorithm, we experimented in an environment where the popularity of content is constantly changing, and confirmed that we are superior to the existing replacement policy through comparing hit rates and analyzing server load.