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Applications of Improved Low-Flow Mortar Type Grouting Method for Road Safety and Constructability in Dangerous Steep Slopes (급경사지 붕괴 위험지역의 도로 안전 및 시공성을 고려한 개선된 저유동 몰탈형 그라우팅공법 적용성 분석)

  • Choi, Gisung;Kim, Seokhyun;Kim, Nakseok
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.40 no.4
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    • pp.409-415
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    • 2020
  • Low-flow mortar injection method grouting technology was selected and the traffic area was preserved as much as possible in order to secure safety for road traffic when the outflow and subsidence of landfill occurred due to ground-water, and etc. In particular, the current existing method was newly improved since there are risks of damage such as hydraulic fracturing at the lower part of the road, spilling of soil particles on steep slopes, and bumps on the road due to excessive injection pressure during construction. This study was carried out at the site of reinforcement work on the road as a maintenance work for the danger zone for collapse of the steep slope of the 00 hill, which was ordered from the 00 city 00 province. The improved low-flow mortar type grouting method adopted a new automated grouting management system and especially, it composites the method for grouting conditions decision by high-pressure pre-grouting test and injection technology by AGS-controlled and studied about grouting effect analysis by using new technology. By applying the improved low-flow mortar type grouting method, it was possible to lay the groundwork for road maintenance work such as the prevention of subsidence of old roads, uneven subsidence of buildings and civil engineering structures, and of soil leakage of ground-water spills. Furthermore, the possibility of application on future grouting work not only for just construction that prevents subsidence of old roads but also for various buildings and civil engineering structures such as railroads, subways, bridges, underground structures, and boulder stone and limestone areas was confirmed.

Wall flow characteristics with static mixer position and housing geometry for preventing urea-salt deposition (우레아염 퇴적 방지를 위한 믹서 위치 및 하우징 형상에 따른 벽면 유동특성에 관한 연구)

  • Lee, Banguk;Lee, Jeekeun
    • Journal of Advanced Marine Engineering and Technology
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    • v.37 no.4
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    • pp.368-377
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    • 2013
  • The Urea-SCR system commercialized shows a remarkable performance to reduce NOx emission in heavy duty diesel engines. However, Urea-water solution injected upstream a mixer, which is set up inside a exhaust pipe to promote exhaust gas-atomized droplet mixing, bumps up against the wall of a exhaust pipe as the droplets flow downstream through the exhaust gas. The urea deposited on the wall of the exhaust pipe is changed into the Urea-salt, resulting in the decreased life-time of the SCR catalysts. Therefore, the development of the urea deposition avoidance technologies is being treated as an important issue of the Urea-SCR systems. An experimental study was carried out to investigate the effects of the wall flow characteristics around the mixer-housing assembly with the variation of the mixer housing surrounding and supporting the mixer, which is designed to increase the wall flow and then to reduce droplet deposition. The flow characteristics was investigated by using a hot-wire anemometry for 2-D simplified duct model, and the housing tilt angles and the position of the mixer were changed : angle of $0^{\circ}$, $1^{\circ}$, $2^{\circ}$, $3^{\circ}$, and mixer positions of 0L, 0.5L, 1L. The results showed that the wall flow onto the exhaust pipe was improved with changing the tilt angle of the mixer housing, and the wall flow improved more when the position of the mixer was on 1L.

Fluxless Bonding Method between Sn and In Bumps Using Ag Capping Layer (Ag층을 이용한 Sn과 In의 무 플럭스 접합)

  • Lee Seung-Hyun;Kim Young-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.2 s.31
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    • pp.23-28
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    • 2004
  • We utilized Ag capping layer for fluxless bonding. To investigate the effect of Ag capping layer, two sets of sample were used. One set was bare In and Sn solders. The other set was In and Sn solders with Ag capping layer. In ($10{\mu}m$) and Sn ($10{\mu}m$) solders were deposited on Cu/Ti/Si substrate using thermal-evaporation, and Ag ($0.1{\mu}m$) capping layers were deposited on In and Sn solders. Solder joints were made by joining two In and Sn deposited specimens at $130^{\circ}C$ for 30 s under 0.8, 1.6, 3.2 MPa using thermal compression bonder. The contact resistance was measured using four-point probe method. The shear strength of the solder joints was measured by the shear test of cross-bar sample in the direction. The microstructure of the solder joints was characterized with SEM and EDS. In and Sn solders without Ag capping layers were only bonded at $130^{\circ}C$ under high bonding pressure. Also the shear strength of the In-Sn solder joints under was lower than that of the Ag/In-Ag/Sn solder joints. The resistance of the solder joints was $2-4\;m{\Omega}$ The solder joints consisted of In-rich phase and Sn-rich phase and the intermixed compounds were found at the interface. As bonding pressure increased, the intermixed compounds formed more.

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High-Speed Cu Filling into TSV and Non-PR Bumping for 3D Chip Packaging (3차원 실장용 TSV 고속 Cu 충전 및 Non-PR 범핑)

  • Hong, Sung-Chul;Kim, Won-Joong;Jung, Jae-Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.18 no.4
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    • pp.49-53
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    • 2011
  • High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.

Development of Environment Friendly Permeable Concrete Bio Blocks (친환경 투수 콘크리트 바이오 블록의 개발)

  • Song, Hyeon-Woo;Lee, Joong-Woo;Kwon, Seong-min;Lee, Tae-Hyeong;Oh, Hyeong-Tak
    • Journal of Navigation and Port Research
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    • v.44 no.4
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    • pp.305-311
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    • 2020
  • Rising sea levels along the coast from global warming causes the increase of wave energy along the coast. This rise in sea levels results in relatively deep water levels, which would incur the loss of sand that had not occurred in the past from erosion in coastal areas. Generally, it has been challenging to protect against coastal erosion, and the slope, cross-sectional shape, and materials are selected for the site conditions depending on the change in external forces. However, the application of counter measures based on insufficient understanding of the phenomenon is causing various damage, indicating the need for technological development and converging technologies to improve credibility. In this study, we developed eco-friendly permeable biopolymer concrete blocks to control the coastal erosion by using the Bio-Coast, an effective porous structure that mitigates the destructive erosion caused by the rising sea levels. The hexagonal design of Bio-Coast was derived from the honeycomb, columnar joints, and clover, which are durable and stable structures in nature, and the design was changed to apply bumps on the Bio-Coast filling in the form of a clover to reduce wave overtopping and run-up. Applying the field condition of beaches on the east coast of Korea, the block weight and size were decided and the prototype blocks were manufactured and are ready for field placement. In particular, it is intended to protect coastal areas from destructive erosion by natural and artificial external forces, and to extend the design to river,s lakes, and natural walking trails, to improve the efficiency of quality control and process control through the use of blocks.

Development and Evaluation of the Road Energy Harvester Using Piezoelectric Cantilevers (압전 캔틸레버 구조를 이용한 도로용 에너지 하베스터의 개발 및 평가)

  • Kim, Chang-Il;Kim, Kyung-Bum;Jeon, Jong-Hac;Jeong, Young-Hun;Cho, Jeong-Ho;Paik, Jong-Hoo;Kang, In-Seok;Lee, Moo-Yong;Choi, Beom-Jin;Cho, Young-Bong;Park, Shin-Seo;Nahm, Sahn;Lee, Young-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.7
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    • pp.511-515
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    • 2012
  • A road energy harvester was designed and fabricated to convert mechanical energy from the vehicle load to electrical energy. The road energy harvester is composed of 24 piezoelectric cantilevers and a vehicle load transfer mechanism. Applying a vehicle load transfer mechanism rather than directly installing energy harvesters under roads decreases the area of road construction and allows more energy harvesters to be installed on the side of the road. The power generation amount with respect to the vehicular velocity change was assessed by installing the vehicle load transfer mechanism and the energy harvester in the form of speed bumps and underground. The energy harvester installed in a speed bump form generated power of 7.61 mW at the vehicular velocity of 20 km/h. Also, power generation of the energy harvester installed in the underground form was 63.9 mW at the vehicular velocity of 28 km/h. Although the number of piezoelectric cantilevers was reduced by 1/3 to 24 in comparison to the previous research results with 72 piezoelectric cantilevers, similar power generation characteristic value was obtained within the vehicular velocity of 20 km/h by altering the vehicle load transfer mechanism and cantilever vibration method.

Temperature Measurement of Flip Chip Joints with Peripheral Array of Solder Bumps (페리퍼럴어레이 플립칩의 온도 분포 특성)

  • Cho Bon-Goo;Lee Taek-Yeong;Lee Jongwon;Kim Jun-Ki;Kim Gangbeom
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.3 s.36
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    • pp.243-251
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    • 2005
  • The distribution of temperature of flip chipped device with peripheral solder bump array was measured with variables, such as the locations and geometries of heater, the size of device, the size of passivation opening. The highest temperature was measured with the larger device, $3.0(mm)\times3.0(mm)$, which has the smallest heater at the center of device and the circular passivation opening. For 2 (watts) power input, the device shows the highest temperature of about $110(^{\circ}C)$. In contrast, the smaller device, $1.5(mm)\times1.8(mm)$, shows that of $90(^{\circ}C)$. In addition to the size effect, the increase of passivation opening size decreased the maximum temperature by about $10(^{\circ}C)$. From the measurement, the temperature of device could be controlled with the size and geometry of heater, the size of device and the size and geometry of passivation opening.

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Reliability Studies on Cu/SnAg Double-Bump Flip Chip Assemblies for Fine Pitch Applications (미세피치용 Cu/SnAg 더블 범프 플립칩 어셈블리의 신뢰성에 관한 연구)

  • Son, Ho-Young;Kim, Il-Ho;Lee, Soon-Bok;Jung, Gi-Jo;Park, Byung-Jin;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.37-45
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    • 2008
  • In this study, reliabilities of Cu (60 um)/SnAg (20 um) double-bump flip chip assemblies were investigated for the flip chip interconnections on organic substrates with 100 um pitch. After multiple reflows at $250^{\circ}C\;and\;280^{\circ}C$, bump contact resistances were almost same regardless of number of reflows and reflow temperature. In the high temperature storage test, there was no bump contact resistance change at $125^{\circ}C$ up to 2000 hours. However, bump contact resistances slightly increased at $150^{\circ}C$ due to Kirkendall voids formation. In the electromigration test, Cu/SnAg double-bump flip chip assemblies showed no electromigration until about 600 hours due to reduced local current density. Finally, in the thermal cycling test, thermal cycling failure mainly occurred at Si chip/Cu column interface which was found out the highest stress concentration site in the finite element analysis. As a result, Al pad was displaced out under thermal cycling. This failure mode was caused by normal compressive strain acting Cu column bumps along perpendicular direction of a Si chip.

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Copper Filling to TSV (Through-Si-Via) and Simplification of Bumping Process (비아 홀(TSV)의 Cu 충전 및 범핑 공정 단순화)

  • Hong, Sung-Jun;Hong, Sung-Chul;Kim, Won-Joong;Jung, Jae-Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.3
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    • pp.79-84
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    • 2010
  • Formation of TSV (Through-Si-Via) with an Au seed layer and Cu filling to the via, simplification of bumping process for three dimensional stacking of Si dice were investigated. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process using $SF_6$ and $C_4F_8$ plasmas alternately. The vias were 40 ${\mu}m$ in diameter, 80 ${\mu}m$ in depth, and were produced by etching for 1.92 ks. On the via side wall, a dielectric layer of $SiO_2$ was formed by thermal oxidation, and an adhesion layer of Ti, and a seed layer of Au were applied by sputtering. Electroplating with pulsed DC was applied to fill the via holes with Cu. The plating condition was at a forward pulse current density of 1000 mA/$dm^2$ for 5 s and a reverse pulse current density of 190 mA/$dm^2$ for 25 s. By using these parameters, sound Cu filling was obtained in the vias with a total plating time of 57.6 ks. Sn bumping was performed on the Cu plugs without lithography process. The bumps were produced on the Si die successfully by the simplified process without serious defect.

A Study on the Evaluation Criteria of Pavement Condition Using Investigation Equipment of Bicycle Road (자전거도로 조사장비를 이용한 포장상태 평가 기준 연구)

  • Kim, Kyungnam;Jo, Shin Haeng;An, Ji Hun;Kim, Nakseok
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.36 no.6
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    • pp.1125-1131
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    • 2016
  • The purpose of this paper is to establish an evaluation criteria for pavement condition in bicycle road. The suggested criteria would help in the activation policy of bicycle use. The conventional evaluation criteria is difficult to be applied for the bicycle road since the bicycle road is sensitive to changes in the driving environments such as obstacles and bumps. This study presents the evaluation criteria that is suitable for bicycle road. The criteria was suggested in 5 grades through the impact acceleration range of RMSI (Road Monitoring System using ICT). The grades of the criteria are divided into a range of grade A to E. The grade A is a very good condition, while the grade E is a state that requires immediate maintenance. This study were confirmed the validity through the survey of user's satisfaction. According to the results of survey, the grade A was shown correlation of 91%. The grade E requiring immediate repair was presented correlation of 94%. It showed that the results of surveying the bicycle road users are highly correlated with the suggested criteria for pavement condition. It showed that the criteria are highly correlated with the survey results. Suggested criteria using the RMSI is expected to be effective for maintenance of the bicycle road. In addition, it is expected to ensure the serviceability and safety for the bicycle users.