• 대한기계학회논문집A
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• 제28권8호
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• pp.1087-1092
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• 2004

Adhesion and friction forces influence adversely on performance and durability of MEMS. It has been reported that the adhesion and friction forces can be reduced with the introduction of micro surface bumps into the contacting interfaces. In this study experiments were conducted to investigate comparatively the effect of hemispherical and torus micro bumps on the adhesion and friction forces. It is confirmed that micro bumps reduce the adhesion and friction forces, and their effect is more pronounced with the bumps of smaller outer boundary radius. Moreover, the results shows that the torus bumps exhibit more rapid decrease of the adhesion and friction forces with the decrease in the outer boundary radius of bump than the hemispherical bumps. When the magnitude of adhesion force is same, the torus bumps generate smaller friction force than the hemispherical bumps. The usage of hemispherical and torus bumps to reduce the adhesion and friction forces in MEMS is discussed.

• Journal of Welding and Joining
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• 제22권3호
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• pp.62-68
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• 2004

The strip Au bumps are bonded using longitudinal ultrasonic far the electronic package. Au bumps on the chip and substrate are aligned in a crossed shape, and the ultrasonic is imposed on the chip to form the solid-state bond between the Au bumps. Deformed bump shapes are calculated using the finite element method, and the bond strength is measured experimentally. The crossed strip Au bumps are deformed similar to the saddle, which provides larger contact surface area and higher friction force. Compared with the previous bonding method between the Au bump and planar pad, higher bond strength is obtained using the crossed strip bumps.

• 한국자기학회지
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• 제4권2호
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• pp.130-134
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• 1994

본 연구에서는 MIG 헤드의 재생 전압 스펙트럼에 나타나는 Bump들의 발생 원인을 설명하고, 이론적으로 예상된 주파수에서 Bump들의 진폭을 컴퓨터로 시뮬레이션 하였다. MIG 헤드의 센더스트와 페라이트 사이의 가상 갭(pseudo gap)이 없는 경우와 양쪽 모두 $0.02\;\mu\textrm{m},\;0.2\;\mu\textrm{m}$, 인 가상 갭을 갖는 3가지 종류의 MIG 헤드들을 설정하고, 금속 분말(Metal Powder) 테입을 사용한 것으로 가정하였다. 시뮬레이션 결과, 이론적으로 예상한 주파수에서 Bump들이 발생하였으며, Bump 진폭 또한 예상치와 거의 일치하였다.

• 마이크로전자및패키징학회지
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• 제8권1호
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• pp.45-51
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• 2001

UBM층과의 젖음 특성 및 표면 산화정도가 미세 피치를 갖는 저 융점 솔더 범프의 볼 형성에 미치는 영향을 연구하였다. Au/Cu/Cr 과 Au/Ni/Ti UBM 위에 공정 조성에 가까운 In-Ag와 공정 조성의 Bi-Sn 솔더를 솔더 층의 증착 순서를 달리하여 증발 증착한 후 lift-off 공정과 열처리 공정을 사용하여 솔더 범프를 형성하였다. In-Ag솔더의 경우 In이 UBM 층과 접한 범프가, 또한 Bi-Sn 솔더의 경우 Sn을 먼저 UBM층위에 먼저 증착시켜 리플로 한 범프가 솔더 볼 형성 경향이 다른 범프에 비해 높았다. 구형의 솔더 범프 형성 정도는 UBM 층과의 젖음 특성에 따라 크게 달라졌다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
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• pp.195-202
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• 2003

In this study, failure mechanisms of Au stud bumps/ACF flip chip joints were investigated underhigh current stressing condition. For the determination of allowable currents, I-V tests were performed on flip chip joints, and applied currents were measured as high as almost 4.2Amps $(4.42\times10^4\;Amp/cm^2)$. Degradation of flip chip joints was observed by in-situ monitoring of Au stud bumps-Al pads contact resistance. All failures, defined at infinite resistance, occurred at upward electron flow (from PCB pads to chip pads) applied bumps (UEB). However, failure did not occur at downward electron flow applied bumps (DEB). Only several $m\Omega$ contact resistance increased because of Au-Al intermetallic compound (IMC) growth. This polarity effect of Au stud bumps was different from that of solder bumps, and the mechanism was investigated by the calculation of chemical and electrical atomic flux. According to SEM and EDS results, major IMC phase was $Au_5Al_2$, and crack propagated along the interface between Au stud bump and IMC resulting in electrical failures at UEB. Therefore. failure mechanisms at Au stud bump/ACF flip chip Joint undo high current density condition are: 1) crack propagation, accompanied with Au-Al IMC growth. reduces contact area resulting in contact resistance increase; and 2) the polarity effect, depending on the direction of electrons. induces and accelerates the interfacial failure at UEBs.

• 마이크로전자및패키징학회지
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• 제14권3호
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• pp.21-27
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• 2007

이방성 전도필름(ACF) 접합에 사용되는 니켈 범프를 무전해 및 전해 도금법으로 제작한 다음, 이 범프들의 기계적 특성과 충격안전성을 압축시험, 범프전단시험, 낙하충격시험을 통하여 연구하였다. Nano indenter를 이용한 압축시험에서 얻은 하중-변형량 데이터를 변환시켜 니켈범프의 응력-변형량 곡선을 구하였다. 전해 니켈 범프는 무전해 니켈 범프에 비해 매우 작은 탄성한계응력과 탄성계수를 나타냈었다. 무전해 니켈 범프의 탄성한계응력과 탄성계수가 각각 600-800MPa, $9.7{\times}10^{-3}MPa/nm$인 반면 전해 니켈 범프의 경우에는 각각 70MPa, $7.8{\times}10^4MPa/nm$이었다. 범프전단 시험에서 무전해 니켈 범프는 소성변형이 거의 일어나지 않고 낮은 전단하중에서 범프가 패드 층에서 튕기듯이 떨어져 나간 반면 전해 니켈 범프는 큰 소성변형을 일으키며 범프가 잘려나갔으며 높은 전단하중을 보여주었다. 낙하충격시험 결과 ACF 플립칩 방법으로 본딩한 무전해 및 전해 범프 모두 높은 충격 신뢰성을 보였다.

• Tribology and Lubricants
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• 제18권4호
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• pp.249-254
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• 2002

Adhesive contact characteristics of torus-shaped bumps were analyzed using the finite element technique considering the adhesive force. Analyses focused on the effect of rim and bump radii on the adhesive contact behavior such as the jump-to-contact behavior, adhesion hysteresis, pull-off forces, contact region and pressure, and surface and subsurface stresses. Analysis results in the absence of adhesive force were also included to examine the effect of adhesive force. The applicability of torus-shaped bumps to the MEMS structure for reduction of friction is discussed.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2006년 추계학술발표대회 개요집
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• pp.205-206
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• 2006

The microstructural evolutions and shear properties of the pure Sn solder bumps with Ni UBMs were investigated during multiple reflows and high temperature storage(HTS) tests. Only a $Ni_3Sn_4$ IMC was found at the bump/Ni UBM interface after 1 reflow. The layer thickness of these IMCs increased with increasing reflow number and testing time. The solder bumps showed a good reliability during multiple reflows and HTS tests.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• ETRI Journal
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• 제36권4호
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• pp.643-653
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• 2014

To reduce interconnect delay and power consumption while improving chip performance, a three-dimensional integrated circuit (3D IC) has been developed with die-stacking and through-silicon via (TSV) techniques. The power supply problem is one of the essential challenges in 3D IC design because IR-drop caused by insufficient supply voltage in a 3D chip reduces the chip performance. In particular, power bumps and TSVs are placed to minimize IR-drop in a 3D power delivery network. In this paper, we propose a design methodology for 3D power delivery networks to minimize the number of power bumps and TSVs with optimum mesh structure and distribute voltage variation more uniformly by shifting the locations of power bumps and TSVs while satisfying IR-drop constraint. Simulation results show that our method can reduce the voltage variation by 29.7% on average while reducing the number of power bumps and TSVs by 76.2% and 15.4%, respectively.