• 전기전자학회논문지
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• 제19권1호
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• pp.41-44
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• 2015

소자의 집적화에 필수적인 소자 분리공정에서 화학약품의 오염 문제등을 발생시키는 화학적 기계연마기술(CMP) 공정을 사용하지 않고 벌크 finFET(fin field effect transistor) 의 트랜치 구조를 형성할 수 있는 공정에 대하여 제안하였다. 사진 감광막 도포시 발생하는 두께차이와 희생층으로 사용되는 실리콘 질화막을 사용하면 에칭 공정만을 사용하여 상대적으로 표면 위로 돌출된 부분의 실리콘 산화막 층을 에칭하는 것은 물론 finFET 의 채널로 사용되는 실리콘 트랜치 구조를 한번에 형성할 수 있는 특징을 갖는다. 본 연구에서는 AZ1512 사진 감광막을 사용하여 50 나노미터급 실리콘 트랜치 구조를 형성하는 공정을 수행하였으며 그 결과를 소개한다.

• 대한전기학회논문지
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• 제45권1호
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• pp.93-99
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• 1996

The formation properties and oxidation mechanism of electrochemically oxidized porous silicon(OPS) films have been studied. To examine the humidity-sensitive properties of OPS films, surface-type and bulk-type humidity sensors were fabricated. The oxidized thickness of porous silicon layer(PSL) increases with the charge supplied during electrochemical humidity sensor shows high sensitivity at high relative humidity in low temperature. The sensitivity and linearity can be improved by optimizing a porosity of PSL. (author). refs., figs.

• 대한전자공학회논문지SD
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• 제47권12호
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• pp.17-23
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• 2010

본 논문에서는 단 채널 bulk-type MOSFET의 문턱전압의 표현식을 해석적으로 도출하는 모텔을 제시하였다 게이트 절연층 내에서는 2차원 Laplace 방정식을, silicon body 내 공핍층에서는 2차원 Poisson 방정식을 Fourier 계수 방법을 이용하여 풀어냈으며, 이로부터 채날 표면전위의 최소치를 도출하고 문턱 전압 표현 식을 도출하였다. 도출된 문턱전압 표현식을 모의 실험한 결과, 소자의 각종 parameter와 bias 전압에 대한 의존성을 비교적 정확히 도출할 수 있음을 확인할 수 있었다.

• Transactions on Electrical and Electronic Materials
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• 제10권3호
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• pp.75-79
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• 2009

An intrinsic silicon thin film passivation layer is deposited by the microwave remote-plasma enhanced chemical vapor deposition at temperature of $175^{\circ}C$ and various gas ratios for solar cell applications. The good quality amorphous silicon films were formed at silane $(SiH_4)$ gas flow rates above 15 seem. The highest effective carrier lifetime was obtained at the $SiH_4$, flow rate of 20 seem and the value was about 3 times higher compared with the bulk lifetime of 5.6 ${\mu}s$ at a fixed injection level of ${\Delta}n\;=\;5{\times}10^{14}\;cm^{-3}$. An annealing treatment was performed and the carrier life times were increased approximately 5 times compared with the bulk lifetime. The optimal annealing temperature and time were obtained at 250 $^{\circ}C$ and 60 sec respectively. This indicates that the combination of the deposition of an amorphous thin film at a low temperature and the annealing treatment contributes to the excellent surface and bulk passivation.

• Transactions on Electrical and Electronic Materials
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• 제5권4호
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• pp.143-147
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• 2004

Surface defects and bulk defects on SOI wafers are studied. Two new metrologies have been proposed to characterize surface and bulk defects in epitaxial layer transfer (ELTRAN) wafers. They included the following: i) laser scattering particle counter and coordinated atomic force microscopy (AFM) and Cu-decoration for defect isolation and ii) cross-sectional transmission electron microscope (TEM) foil preparation using focused ion beam (FIB) and TEM investigation for defect morphology observation. The size of defect is 7.29 urn by AFM analysis, the density of defect is 0.36 /cm$^2$ at as-direct surface oxide defect (DSOD), 2.52 /cm$^2$ at ox-DSOD. A hole was formed locally without either the silicon or the buried oxide layer (Square Defect) in surface defect. Most of surface defects in ELTRAN wafers originate from particle on the porous silicon.

• 한국세라믹학회지
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• 제49권4호
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• pp.301-307
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• 2012

SiAlON glasses are silicates or alumino-silicates, containing Mg, Ca, Y or rare earth (RE) ions as modifiers, in which nitrogen atoms substitute for oxygen atoms in the glass network. These glasses are found as intergranular films and at triple point junctions in silicon nitride ceramics and these grain boundary phases affect their fracture behaviour. This paper provides an overview of the preparation of M-SiAlON glasses and outlines the effects of composition on properties. As nitrogen substitutes for oxygen in SiAlON glasses, increases are observed in glass transition temperatures, viscosities, elastic moduli and microhardness. These property changes are compared with known effects of grain boundary glass chemistry in silicon nitride ceramics. Oxide sintering additives provide conditions for liquid phase sintering, reacting with surface silica on the $Si_3N_4$ particles and some of the nitride to form SiAlON liquid phases which on cooling remain as intergranular glasses. Thermal expansion mismatch between the grain boundary glass and the silicon nitride causes residual stresses in the material which can be determined from bulk SiAlON glass properties. The tensile residual stresses in the glass phase increase with increasing Y:Al ratio and this correlates with increasing fracture toughness as a result of easier debonding at the glass/${\beta}-Si_3N_4$ interface.

• 대한전기학회논문지
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• 제41권9호
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• pp.1013-1020
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• 1992

The conductivity variation of a high resistivity bulk silicon semiconductor, whose electrodes were deposited with aluminum vapor, was studied experimentally by measuring the X-ray intensity and current flow, which was developed by X-ray radiation while applying a pulse voltage to the silicon, in a load resistor connected to the semiconductor. The current flow observed immediately as the X-ray radiated, and when the X-ray decreased. It was found from the observation of switching current for the X-ray intensity and the voltage applied in the semiconductor that the switching current of the semiconductor increased as the intensity of the X-ray and the applied voltage increased. In case of lower applied voltage, the switching current for higher applied voltage depended on the intensity of the X-ray radiated due to the saturation of electron and hole.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 C
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• pp.1985-1987
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• 2002

Silicon bulk micromachined micromirrors are designed and fabricated for out-of-plane right angle reflection. The micromirror is comprised of a minor plate, springs, magnetic bars and electrodes. Single crystalline silicon is used for a flatness improvement of a mirror plate. Out-of-plane right angle reflection requires a 45 degree operation of the micromirror. The micromirrors are operated by applying a magnetic field, which is generated by a coil located below a substrate. For an individual mirror operation, each mirror is clamped using an electrostatic force against the electromagnetic force. Angular deflections are measured and compared with theoretical data. The micro mirror operates up to 45 degree when magnetic field is 4 kA/m which is generated by a 115 mA coil current Simple addressing is tested, and it is shown that a clamping voltage is less than 5V.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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• pp.170-173
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• 2003

In this paper, we proposed a new bulk LDMOS structure which can be used for RF application, and its fabrication steps were introduced. The simulated devices consist of three types: Bulk device, SLB(SOI Like Bulk), and SOI device. As a result of process and device simulation, we showed electrical characteristics, such as threshold voltage, subthreshold slope, DIBL(Drain Induced Barrier Lowering), off-state current, and breakdown voltage. In this simulation study, the lattice temperature model was adopted to see the device characteristics with lattice temperature during the operation. SLB device structure showed the best breakdown characteristics among the other structures. The breakdown voltage of SLB structure is about 9V, that of bulk is 7V, and that of SOI is 8V.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.677-680
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• 1999

Rapid developing automation technology enhances the need of sensors. Among many materials, silicon has the advantages of electrical and mechanical property, Single-crystalline silicon has different piezoresistivity on 야fferent directions and a current leakage at elevated temperature, but poly-crystalline silicon has the possibility of controling resistivity using dopping ions, and operation at high temperature, which is grown on insulating layers. Each wafer has slightly different thicknesses that make difficult to obtain the precisely same thickness of a diaphragm. This paper deals with the fabrication process to make poly-crystalline silicon based pressure sensors which includes diaphragm thickness and wet-etching techniques for each layer. Diaphragms of the same thickness can be fabricated consisting of deposited layers by silicon bulk etching. HF etches silicon nitride, HNO$_3$+HF does poly -crystalline silicon at room temperature very fast. Whereas ethylenediamice based etchant is used to etch silicon at 11$0^{\circ}C$ slowly.