• Title/Summary/Keyword: buffer-aided

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Relaying Protocols and Delay Analysis for Buffer-aided Wireless Powered Cooperative Communication Networks

  • Zhan, Jun;Tang, Xiaohu;Chen, Qingchun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.8
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    • pp.3542-3566
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    • 2018
  • In this paper, we investigate a buffer-aided wireless powered cooperative communication network (WPCCN), in which the source and relay harvest the energy from a dedicated power beacon via wireless energy transfer, then the source transmits the data to the destination through the relay. Both the source and relay are equipped with an energy buffer to store the harvested energy in the energy transfer stage. In addition, the relay is equipped with a data buffer and can temporarily store the received information. Considering the buffer-aided WPCCN, we propose two buffer-aided relaying protocols, which named as the buffer-aided harvest-then-transmit (HtT) protocol and the buffer-aided joint mode selection and power allocation (JMSPA) protocol, respectively. For the buffer-aided HtT protocol, the time-averaged achievable rate is obtained in closed form. For the buffer-aided JMSPA protocol, the optimal adaptive mode selection scheme and power allocation scheme, which jointly maximize the time-averaged throughput of system, are obtained by employing the Lyapunov optimization theory. Furthermore, we drive the theoretical bounds on the time-averaged achievable rate and time-averaged delay, then present the throughput-delay tradeoff achieved by the joint JMSPA protocol. Simulation results validate the throughput performance gain of the proposed buffer-aided relaying protocols and verify the theoretical analysis.

Energy-efficient Buffer-aided Optimal Relay Selection Scheme with Power Adaptation and Inter-relay Interference Cancellation

  • Xu, Xiaorong;Li, Liang;Yao, Yingbiao;Jiang, Xianyang;Hu, Sanqing
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.11
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    • pp.5343-5364
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    • 2016
  • Considering the tradeoff between energy consumption and outage behavior in buffer-aided relay selection, a novel energy-efficient buffer-aided optimal relay selection scheme with power adaptation and Inter-Relay Interference (IRI) cancellation is proposed. In the proposed scheme, energy consumption minimization is the objective with the consideration of relay buffer state, outage probability and relay power control, in order to eliminate IRI. The proposed scheme selects a pair of optimal relays from multiple candidate relays, denoted as optimal receive relay and optimal transmit relay respectively. Source-relay and relay-destination communications can be performed within a time-slot, which performs as Full-Duplex (FD) relaying. Markov chain model is applied to analyze the evolution of relay buffer states. System steady state outage probability and achievable diversity order are derived respectively. In addition, packet transmission delay and power reduction performance are investigated with a specific analysis. Numerical results show that the proposed scheme outperforms other relay selection schemes in terms of outage behavior with power adaptation and IRI cancellation in the same relay number and buffer size scenario. Compared with Buffer State relay selection method, the proposed scheme reduces transmission delay significantly with the same amount of relays. Average transmit power reduction can be implemented to relays with the increasing of relay number and buffer size, which realizes the tradeoff between energy-efficiency, outage behavior and delay performance in green cooperative communications.

A Buffer-Aided Successive Relaying Technique with a Priori Decoding Information (선행 복호 정보를 활용한 버퍼기반 연쇄적 중계 기법)

  • Lee, Byeong Su;Jung, Bang Chul;Ban, Tae-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.275-280
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    • 2016
  • In this paper, we propose a novel relay selection technique which utilizes a priori decoding information at relays for buffer-aided successive relaying networks. In the conventional relaying schemes, a single relay pair is selected for receiving data from the source and transmitting data to the destination. In the proposed technique, however, all relays except the relay selected for transmitting data to the destination try to decode the received signal from the source, and they store the data if they succeed decoding. The proposed technique selects the relay such that it can succeed its own transmission and it maximizes the number of relays successfully decoding the data from the source at the same time. It is shown that the proposed relaying technique significantly outperforms the conventional buffer-aided relaying schemes in terms of outage probability through extensive computer simulations.

A Novel Relay Selection Technique with Decoded Information in Buffer-Aided Successive Relaying Systems (버퍼기반 연쇄적 중계시스템에서 복호 정보를 활용한 중계기 선택 알고리즘)

  • Lee, Byeong Su;Ban, Tae Won;Jung, Bang Chul
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.51-53
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    • 2015
  • In this paper, we propose a new relay selection technique which utilizes interference cancellation with decoding information at multiple relays for buffer-aided successive relaying systems. The transmitting relay is selected if its own transmission to the destination is successful and the number of relays which can successfully decode the data from the source is the maximum at the same time. Simulation results show that the proposed relay selection technique significantly outperforms the conventional relay selection scheme in terms of outage probability.

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Performance Analysis of Adaptive Link-Selection Scheme considering Buffer and Channel State Information (버퍼와 채널 상태를 고려한 적응형 링크선택 방안의 성능 분석)

  • Kim, Hyujun;Chung, Young-uk
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.402-407
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    • 2018
  • Link selection strategy has been an important technical issues of relay network. In this paper, we introduce a link selection scheme in the bidirectional, buffer-aided relay network. Three kinds of information such as the states of the queue at the relay buffer, the qualities of the links, and the states of the queues at the user buffer are considered. Throughput and delay performance is evaluated under three cases with different available information.

차세대 버퍼도움 중계전송 기법

  • Kim, Su-Min
    • Information and Communications Magazine
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    • v.33 no.4
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    • pp.92-98
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    • 2016
  • 본고에서는 5세대 이동통신 시스템의 유망기술 중 하나인 차세대 버퍼도움 (buffer-aided) 중계전송 기법의 핵심개념과 최신연구 동향에 대해서 알아본다. 먼저, 3개 노드로 구성되는 기본 중계기 네트워크에서 버퍼도움 중계전송의 원리와 관련 연구결과들을 살펴본다. 다음으로 다수 노드로 구성되는 다중 중계기 네트워크에서 기존 중계기 선택전송 기법 및 최신 버퍼도움 중계기 선택전송 기법에 대해서 비교하여 살펴본다. 마지막으로 차세대 버퍼도움 중계전송 기법응 다양한 환경에 적용한 응용 연구에 대해 살펴보고 본고를 마친다.

A Study on the Development of Computer Aided Design System for Fixed Offshore Structures (고정식 해양구조물의 전산기 지원 설계시스템 개발에 관한 연구)

  • Sin, Hyeon-Gyeong;Park, Gyu-Won
    • Journal of Ocean Engineering and Technology
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    • v.9 no.2
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    • pp.83-88
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    • 1995
  • In this paper, the solid modeller suitable for PC was developed for Top-down 3-D representation and analysis of fixed offshore structures. Also solid modelling and hidden line removal were conducted in order to visualize the offshore structures based on the scan line z-buffer algorithm.

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Design of an Efficient Coarse Frequency Estimator Using a Serial Correlator for DVB-S2 (직렬 상관기를 이용한 디지털 위성방송 주파수 추정회로 설계)

  • Yun, Hyoung-Jin;SunWoo, Myung-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.4A
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    • pp.434-439
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    • 2008
  • This paper proposes an efficient coarse frequency synchronizer for digital video broadcasting - second generation (DVB-S2). The input signal requirement of acquisition range for coarse frequency estimator in the DVB-S2 is around ${\pm}1.5625Mhz$, which corresponds to 6.25% of the symbol rate at 25Mbaud. At the process of analyzing the robust algorithm among data-aided approaches, we find that the Luise & Reggiannini (L&R) algorithm is the most promising one for coarse frequency estimation with respect to estimation performance and complexity. However, it requires many multipliers and adders to compute output values of correlators. We propose an efficient architecture identifying the serial correlator with the buffer and multiplexers. The proposed coarse frequency synchronizer can reduce the hardware complexity about 92% of the direct implementation. The proposed architecture has been implemented and verified on the Xilinx Virtex II FPGA.

Biological Methanol Production by a Type II Methanotroph Methylocystis bryophila

  • Patel, Sanjay K.S.;Mardina, Primata;Kim, Sang-Yong;Lee, Jung-Kul;Kim, In-Won
    • Journal of Microbiology and Biotechnology
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    • v.26 no.4
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    • pp.717-724
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    • 2016
  • Methane (CH4) is the most abundant component in natural gas. To reduce its harmful environmental effect as a greenhouse gas, CH4 can be utilized as a low-cost feed for the synthesis of methanol by methanotrophs. In this study, several methanotrophs were examined for their ability to produce methanol from CH4; including Methylocella silvestris, Methylocystis bryophila, Methyloferula stellata, and Methylomonas methanica. Among these methanotrophs, M. bryophila exhibited the highest methanol production. The optimum process parameters aided in significant enhancement of methanol production up to 4.63 mM. Maximum methanol production was observed at pH 6.8, 30℃, 175 rpm, 100 mM phosphate buffer, 50 mM MgCl2 as a methanol dehydrogenase inhibitor, 50% CH4 concentration, 24 h of incubation, and 9 mg of dry cell mass ml-1 inoculum load, respectively. Optimization of the process parameters, screening of methanol dehydrogenase inhibitors, and supplementation with formate resulted in significant improvements in methanol production using M. bryophila. This report suggests, for the first time, the potential of using M. bryophila for industrial methanol production from CH4.

Investigation into Electrical Characteristics of Logic Circuit Consisting of Modularized Monolithic 3D Inverter Unit Cell

  • Lee, Geun Jae;Ahn, Tae Jun;Lim, Sung Kyu;Yu, Yun Seop
    • Journal of information and communication convergence engineering
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    • v.20 no.2
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    • pp.137-142
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    • 2022
  • Monolithic three-dimensional (M3D) logics such as M3D-NAND, M3D-NOR, M3D-buffer, M3D 2×1 multiplexer, and M3D D flip-flop, consisting of modularized M3D inverters (M3D-INVs), have been proposed. In the previous M3D logic, each M3D logic had to be designed separately for a standard cell library. The proposed M3D logic is designed by placing modularized M3D-INVs and connecting interconnects such as metal lines or monolithic inter-tier-vias between M3D-INVs. The electrical characteristics of the previous and proposed M3D logics were simulated using the technology computer-aided design and Simulation Program with Integrated Circuit Emphasis with the extracted parameters of the previously developed LETI-UTSOI MOSFET model for n- and p-type MOSFETs and the extracted external capacitances. The area, propagation delay, falling/rising times, and dynamic power consumption of the proposed M3D logic are lower than those of previous versions. Despite the larger space and lower performance of the proposed M3D logic in comparison to the previous versions, it can be easily designed with a single modularized M3D-INV and without having to design all layouts of the logic gates separately.