• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.05b
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• pp.125-129
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• 2004

The mold transformers have been widely used in underground substations in large building and have some advantages in comparison to oil-transformer, that is low fire risk, excellent environmental compatibility, compact size and high reliability. In addition, the application of mold transformer for outdoor is possible due to development of epoxy resin. The mold transformer generally has cooling duct between low voltage coil and high voltage coil. A mold transformer made by one body molding method has been developed for small size and low loss, but it needs some cooling method because heat radiation between each winding is difficult. The life of transformer is significantly dependent on the thermal behavior in windings. Many transformer designers have calculated temperature distribution and hot spot point by FEM(finite element method) to analyze winding temperature rise. In this paper, the temperature distribution and thermal stress analysis of 100kVA pole cast resin transformer for power distribution are investigated by FEM program.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1620-1622
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• 2003

Recently, as the technology for the development of high voltage power apparatus using SF6 gas has made remarkable progress, it became possible to develop more compact power apparatus adopting single body substation system. In these gas insulated power apparatus, it is impossible to achieve perfect and safe insulation using only SF6 gas, because some solid insulation parts should be installed to support current-carrying conductor parts for electrical and mechanical safety. When spacers were installed in SF6 gas insulation system, they were exposed to severe electrical intensification which could reduce system insulation performance and restrict the rated operating voltage So, it is necessary to clarify the dielectric characteristics of spacers by analytically and experimentally, in order to design and develop more compact and optimum gas insulated systems. In this paper, the field distribution of three-phase spacers were investigated using three dimensional electrostatic field analysis tool adopting BEM method. And the obtained results were compared to the conventional two dimensional computations. According to these three dimensional calculations, it was possible to find out weak points in the spacer more clearly and these results could be applied to design more compact and optimum three phase spacer developments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.5
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• pp.25-31
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• 2009

A low power SRAM using supply voltage charge recycling (SVCR-SRAM) scheme is proposed. It divides into two SRAM cell blocks and supplies two different powers. A supplied power is $V_{DD}$ and $V_{DD}/2$. The other is $V_{DD}/2$ and GND. When N-bit cells are accessed, the charge used in N/2-bit cells with VDD and $V_{DD}/2$ is recycled in the other N/2-bit cells with $V_{DD}/2$ and GND. The SVCR scheme is used in the power consuming parts which bit line, data bus, word line, and SRAM cells to reduce dynamic power. The other parts of SRAM use $V_{DD}$ and GND to achieve high speed. Also, the SVCR-SRAM results in reducing leakage power of SRAM cells due to the body-effect. A 64K-bit SRAM ($8K{\times}8$bits) is implemented in a $0.18{\mu}m$ CMOS process. It saves 57.4% write power and 27.6% read power at $V_{DD}=1.8V$ and f=50MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.2
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• pp.306-316
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• 2016

In this paper, an NMOS-diode eFuse OTP (One-Time Programmable) memory cell is proposed using a parasitic junction diode formed between a PW (P-Well), a body of an isolated NMOS (N-channel MOSFET) transistor with the small channel width, and an n+ diffusion, a source node, in a DNW (Deep N-Well) instead of an NMOS transistor with the big channel width as a program select device. Blowing of the proposed cell is done through the parasitic junction formed in the NMOS transistor in the program mode. Sensing failures of '0' data are removed because of removed contact voltage drop of a diode since a NMOS transistor is used instead of the junction diode in the read mode. In addition, a problem of being blown for a non-blown eFuse from a read current through the corresponding eFuse OTP cell is solved by limiting the read current to less than $100{\mu}A$ since a voltage is transferred to BL by using an NMOS transistor with the small channel width in the read mode.

• Journal of Biomedical Engineering Research
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• v.28 no.1
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• pp.84-94
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• 2007

In order to collect information on local distribution of conductivity and permittivity underneath a scan probe, we developed a multi-frequency trans-admittance scanner (TAS). Applying a sinusoidal voltage with variable frequency on a chosen distal part of a human body, we measure exit currents from 320 grounded electrodes placed on a chosen surface of the subject. The electrodes are packaged inside a small and light scan probe. The system includes one voltage source and 17 digital ammeters. Front-end of each ammeter is a current-to-voltage converter with virtual grounding of a chosen electrode. The rest of the ammeter is a voltmeter performing digital phase-sensitive demodulation. Using resistor loads, we calibrate the system including the scan probe to compensate frequency-dependent variability of current measurements and also inter-channel variability among multiple. We found that SNR of each ammeter is about 85dB and the minimal measurable current is 5nA. Using saline phantoms with objects made from TX-151, we verified the performance of the lesion estimation algorithm. The error rate of the depth estimation was about 19.7%. For the size estimate, the error rate was about 15.3%. The results suggest improvement in lesion estimation algorithm based on multi-frequency trans-admittance data.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.197-204
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• 2010

This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented m a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with load capacitance of 16 pF. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The die size is $1.9{\times}1.5\;mm$.

• Journal of the Korean Society of Radiology
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• v.11 no.6
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• pp.501-508
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• 2017

The dependence of CT scanning parameters on the CT number to physical density conversion from the CT image of CT and CBCT electron density phantom acquired by the CT scanner using in radiotherapy were analyzed by experiment. The CT numbers were independent of the tube current product exposure time, slice thickness, filter of image reconstruction, field of view and volume of phantom. But the CT numbers were dependent on the tube voltage and cross section of phantom. As a result, for physical density range above 0, the maximum CT number difference observed at the tube voltage between 90 and 120 kVp was 27%, and the maximum CT number difference observed between CT body and head electron density phantom was 15%.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.6
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• pp.68-74
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• 2011

The touch or step voltages which exist in the vicinity of a grounding electrode are closely related to the earth structure and resistivity and the ground current. The grounding design approach is required to determine the grounding electrode location where the hazardous voltages are minimized. In this paper, in order to propose a method of mitigating the electric shock hazards caused by the ground surface potential rise in the vicinity of a counterpoise, the hazards relevant to touch voltage were evaluated as a function of the soil resistivity ratio $\rho_2/\rho_1$ for several practical values of two-layer earth structures. The touch voltage and current on the ground surface just above the test electrode are calculated with CDEGS program. As a consequence, it was found that burying a grounding electrode in the soil with low resistivity is effective to reduce the electric shock hazards. In the case that the bottom layer soil where a counterpoise is buried has lower resistivity than the upper layer soil, when the upper layer soil resistivity is increased, the surface potential is slightly raised, but the current through the human body is reduced with increasing the upper layer soil resistivity because of the greater contact resistance between the earth surface and the feet. The electric shock hazard in the vicinity of grounding electrodes is closely related to soil structure and resistivity and are reduced with increasing the ration of the upper layer resistivity to the bottom layer resistivity in two-layer soil.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.87-93
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• 2010

This paper presents a low-power, wide tuning range VCO with automatic two-step negative-Gm calibration loop to compensate for the process, voltage and temperature variation. To cover the wide tuning range, digital automatic negative-Gm tuning loop and analog automatic amplitude calibration loop are used. Adaptive body biasing (ABB) technique is also adopted to minimize the power consumption by lowering the threshold voltage of transistors in the negative-Gm core. The power consumption is 2 mA to 6mA from a 1.2 V supply. The VCO tuning range is 2.65 GHz, from 2.35 GHz to 5 GHz. And the phase noise is -117 dBc/Hz at the 1 MHz offset when the center frequency is 3.2 GHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.6
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• pp.809-817
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• 2020

In the design and development process of Small-Sat power distribution and transmission module, the stability of dynamic resources was evaluated by a deep learning algorithm. The requirements for the stability evaluation consisted of the power distribution function of the power distribution module and demand module to the SAR radar in Small-Sat. To verify the performance of the switching power components constituting the power module PDM, the reliability was verified using a dynamic neural network. The adoption material of deep learning for reliability verification is the power distribution function of the payload to the power supplied from the small satellite main body. Modeling targets for verifying the performance of this function are output voltage (slew rate control), voltage error, and load power characteristics. First, to this end, the Coefficient Structure area was defined by modeling, and PCB modules were fabricated to compare stability and reliability. Second, Levenberg-Marquare based Two-Way NARX neural network Sigmoid Transfer was used as a deep learning algorithm.