• Title/Summary/Keyword: body-voltage

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Highly Robust AHHVSCR-Based ESD Protection Circuit

  • Song, Bo Bae;Koo, Yong Seo
    • ETRI Journal
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    • v.38 no.2
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    • pp.272-279
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    • 2016
  • In this paper, a new structure for an advanced high holding voltage silicon controlled rectifier (AHHVSCR) is proposed. The proposed new structure specifically for an AHHVSCR-based electrostatic discharge (ESD) protection circuit can protect integrated circuits from ESD stress. The new structure involves the insertion of a PMOS into an AHHVSCR so as to prevent a state of latch-up from occurring due to a low holding voltage. We use a TACD simulation to conduct a comparative analysis of three types of circuit - (i) an AHHVSCR-based ESD protection circuit having the proposed new structure (that is, a PMOS inserted into the AHHVSCR), (ii) a standard AHHVSCR-based ESD protection circuit, and (iii) a standard HHVSCR-based ESD protection circuit. A circuit having the proposed new structure is fabricated using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology. The fabricated circuit is also evaluated using Transmission-Line Pulse measurements to confirm its electrical characteristics, and human-body model and machine model tests are used to confirm its robustness. The fabricated circuit has a holding voltage of 18.78 V and a second breakdown current of more than 8 A.

HBM ESD Tester for On-wafer Test using Flyback Method (Flyback방식을 이용한 on-wafer용 HBM ESD 테스터 구현)

  • 박창근;염기수
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.469-472
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    • 2002
  • We made ESD tester to measure ESD threshold voltage of semiconductor devices. The HBM ESD test is the most popular method to measure the ESD threshold voltage of MMIC. We use flyback method which is one of the DC-DC converter to get high ESD voltage. With flyback method, we can isolate the low voltage part from the high voltage part of HBM ESD tester. We use an air gap of the relay which is used for switch to satisfy the rise time of ESD standard(MIL-STll-883D). As a result, with the flyback method and the air gap of relay, we can make ESD tester whose parasitic components are minimized.

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Analysis of a Parasitic-Diode-Triggered Electrostatic Discharge Protection Circuit for 12 V Applications

  • Song, Bo Bae;Lee, Byung Seok;Yang, Yil Suk;Koo, Yong-Seo
    • ETRI Journal
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    • v.39 no.5
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    • pp.746-755
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    • 2017
  • In this paper, an electrostatic discharge (ESD) protection circuit is designed for use as a 12 V power clamp by using a parasitic-diode-triggered silicon controlled rectifier. The breakdown voltage and trigger voltage ($V_t$) of the proposed ESD protection circuit are improved by varying the length between the n-well and the p-well, and by adding $n^+/p^+$ floating regions. Moreover, the holding voltage ($V_h$) is improved by using segmented technology. The proposed circuit was fabricated using a $0.18-{\mu}m$ bipolar-CMOS-DMOS process with a width of $100{\mu}m$. The electrical characteristics and robustness of the proposed ESD circuit were analyzed using transmission line pulse measurements and an ESD pulse generator. The electrical characteristics of the proposed circuit were also analyzed at high temperature (300 K to 500 K) to verify thermal performance. After optimization, the $V_t$ of the proposed circuit increased from 14 V to 27.8 V, and $V_h$ increased from 5.3 V to 13.6 V. The proposed circuit exhibited good robustness characteristics, enduring human-body-model surges at 7.4 kV and machine-model surges at 450 V.

A simple analytical model for deriving the threshold voltage of a SOI type symmetric DG-MOSFET (SOI형 대칭 DG MOSFET의 문턱전압 도출에 대한 간편한 해석적 모델)

  • Lee, Jung-Ho;Suh, Chung-Ha
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.16-23
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    • 2007
  • For a fully depleted SOI type symmetric double gate MOSFET, a simple expression for the threshold voltage has been derived in a closed-form To solve analytically the 2D Poisson's equation in a silicon body, the two-dimensional potential distribution is assumed approximately as a polynomial of fourth-order of x, vertical coordinate perpendicular to the silicon channel. From the derived expression for the surface potential, the threshold voltage can be obtained as a simple closed-form. Simulation result shows that the threshold voltage is exponentially dependent on channel length for the range of channel length up to $0.01\;[{\mu}m]$.

Nondestructive Measurement on Electrical Characteristics of Amorphous Silicon by Using the Laser Beam (레이저 빔을 이용한 비정질실리콘 전기적 특성의 비파괴 측정)

  • 박남천
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.11a
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    • pp.36-39
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    • 2000
  • A small electrical potential difference which appears on any solid body when subjected to illumination by a modulated light beam generated by laser is called photocharge voltage(PCV)[1,2]. This voltage is proportional to the induced change in the surface electrical charge and is capacitatively measured on various materials such as conductors, semiconductors, ceramics, dielectrics and biological objects. The amplitude of the detected signal depends on the type of material under investigation, and on the surface properties of the sample. In photocharge voltage spectroscopy measurements[3], the sample is illuminated by both a steady state monochromatic bias light and the pulsed laser. The monochromatic light is used to created a variation in the steady state population of trap levels in the surface and space charge region of semiconductor samples which does result in a change in the measured voltage. Using this technique the spatial variation of PCV can be utilized to evaluate the surface conditions of the sample and the variation of the PCV due to the monochromatic bias light are utilized to characterize the surface states. A qualitative analysis of the proposed measurement is present along with experimental results performed on amorphous silicon samples. The deposition temperature was varied in order to obtain samples with different structural, optical and electronic properties and measurements are related to the defect density in amorphous thin film.

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Measurement and Modeling of Personal Exposure to the Electric and Magnetic Fields in the Vicinity of High Voltage Power Lines

  • Tourab, Wafa;Babouri, Abdesselam
    • Safety and Health at Work
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    • v.7 no.2
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    • pp.102-110
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    • 2016
  • Background: This work presents an experimental and modeling study of the electromagnetic environment in the vicinity of a high voltage substation located in eastern Algeria (Annaba city) specified with a very high population density. The effects of electromagnetic fields emanating from the coupled multi-lines high voltage power systems (MLHV) on the health of the workers and people living in proximity of substations has been analyzed. Methods: Experimental Measurements for the Multi-lines power system proposed have been conducted in the free space under the high voltage lines. Field's intensities were measured using a referenced and calibrated electromagnetic field meter PMM8053B for the levels 0 m, 1 m, 1.5 m and 1.8 m witch present the sensitive's parts as organs and major functions (head, heart, pelvis and feet) of the human body. Results: The measurement results were validated by numerical simulation using the finite element method and these results are compared with the limit values of the international standards. Conclusion: We project to set own national standards for exposure to electromagnetic fields, in order to achieve a regional database that will be at the disposal of partners concerned to ensure safety of people and mainly workers inside high voltage electrical substations.

The Characteristics of Efficiency and Torque in $L_1-B_8$ mode USM Having Linear Movement (선형 운동하는 $L_1-B_8$ 모드 초음파 전동기의 효율과 토크 특성)

  • U, Sang-Ho;Shin, Soon-In;Kim, Jin-Soo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.585-588
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    • 2002
  • The USM uses friction between a mobile part (rotor) and a vibration part(stator), which is different from the principle of the conventional motor based on the interaction of electric and magnetic fields. In this thesis, a flat-type $L_1-B_8$ mode USM was designed and fabricated the characteristics of an ultrasonic vibration. The results of fabricated USM are as follows: (1) In case of ultrasonic motor with elastic-body of stainless, when applied voltage, frequency, pressing force of rotor were 50 [V], 27.9 [kHz], 1.5 [N], 5.0[mN m] respectively, the speed of revolution could be presented up to 0 [cm/s]. (2) In case of ultrasonic motor with elastic-body of brass, when applied voltage, frequency, pressing force of rotor were 50 [V], 21.4 [kHz], 1.5 [N], 1.4[mN m]respectively, the speed of rotor revolution was presented up to 0 [cm/s]. (3) The USM of elastic-body of stainless showing 1.17[%], somewhat low, in the maximum efficiency according to torque was superior to the USM of elastic-body of brass showing 0.34 [%]. The Flat-type $L_1-B_8$ mode USM had characteristics of typical drooping torque-speed, large torque and high speed, and operating in both directions by phase reversal.

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A Study on Output Characteristics of the π-type Piezoelectric Harvester (π-type 압전 하베스터의 출력 특성 연구)

  • Lee, Byeong-Ha;Jeong, Seong-Su;Cheon, Seong-Kyu;Ha, Yong-Woo;Park, Tae-Gone
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.1
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    • pp.1-6
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    • 2015
  • Generating output characteristics of a ${\pi}$-type piezoelectric harvester depending on size of the ceramic and the elastic body were studied. The ${\pi}$-type piezoelectric harvester consists of a rectangular piezoelectric ceramic and a ${\pi}$ shaped elastic body. If the tensions is applied at both ends of an elastic body legs, the piezoelectric effect occurs at the ceramics through the form change of the elastic body. The structure of this ${\pi}$-type harvester can be used in a various area than an existing type generator, because it prevent from direct pressure to the ceramic. Generating characteristics of the harvester were analyzed by using finite element method program. The piezoelectric harvester was fabricated on the basis of analyzed results and attached on a frequency controllable vibrator to measure the output characteristics. And generating characteristics were defined by comparing analysis results and experimental results. The highest output voltage was obtained when the ceramic length, thickness were 20 mm, 0.5 mm in the analysis result. And experiment was performed by analysis results at low frequency region, output voltage was generated about 6 V.

Adjusting the Sensitivity of an Active Pixel Sensor Using a Gate/Body-Tied P-Channel Metal-Oxide Semiconductor Field-Effect Transistor-Type Photodetector With a Transfer Gate (전송 게이트가 내장된 Gate/Body-Tied P-Channel Metal-Oxide Semiconductor Field-Effect Transistor 구조 광 검출기를 이용한 감도 가변형 능동 화소 센서)

  • Jang, Juneyoung;Lee, Jewon;Kwen, Hyeunwoo;Seo, Sang-Ho;Choi, Pyung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.30 no.2
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    • pp.114-118
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    • 2021
  • In this study, the sensitivity of an active pixel sensor (APS) was adjusted by employing a gate/body-tied (GBT) p-channel metal-oxide semiconductor field-effect transistor (PMOSFET)-type photodetector with a transfer gate. A GBT PMOSFET-type photodetector can amplify the photocurrent generated by light. Consequently, APSs that incorporate GBT PMOSFET-type photodetectors are more sensitive than those APSs that are based on p-n junctions. In this study, a transfer gate was added to the conventional GBT PMOSFET-type photodetector. Such a photodetector can adjust the sensitivity of the APS by controlling the amount of charge transmitted from the drain to the floating diffusion node according to the voltage of the transfer gate. The results obtained from conducted simulations and measurements corroborate that, the sensitivity of an APS, which incorporates a GBT PMOSFET-type photodetector with a built-in transfer gate, can be adjusted according to the voltage of the transfer gate. Furthermore, the chip was fabricated by employing the standard 0.35 ㎛ complementary metal-oxide semiconductor (CMOS) technology, and the variable sensitivity of the APS was thereby experimentally verified.

A Study on PMOS Embedded ESD Protection circuit with Improved Robustness for High Voltage Applications. (향상된 감내특성을 갖는 PMOS 삽입형 고전압용 ESD 보호회로에 관한 연구)

  • Park, Jong-Joon
    • Journal of IKEEE
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    • v.21 no.3
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    • pp.234-239
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    • 2017
  • In this paper, we propose an ESD (Electrostatic Discharge) protection circuit based on a new structure of SCR (Silicon Controlled Rectifier) embedded with PMOS structure. The proposed ESD protection circuit has a built-in PMOS structure and has a latch-up immunity characteristic and an improved tolerance characteristic. To verify the characteristics of the proposed ESD protection circuit and to analyze its operating characteristics, we compared and analyzed the characteristics of the existing ESD protection circuit using TCAD simulation. Simulation results show that the proposed protection ESD protection circuit has superior latch-up immunity characteristics like the existing SCR-based ESD protection device HHVSCR (High Holding Voltage SCR). Also, according to the results of the HBM (Human Body Model) maximum temperature test, the proposed ESD protection circuit has a maximum temperature value of 355K, which is about 20K lower than the existing HHVSCR 373K. In addition, the proposed ESD protection circuit with improved electrical characteristics is designed by applying N-STACK technology. As a result of the simulation, the proposed ESD protection circuit has a holding voltage characteristic of 2.5V in a single structure, and the holding voltage increased to 2-STACK 4.2V, 3-STACK 6.3V, 4-STACK 9.1V.