• The KIPS Transactions:PartA
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• v.14A no.3 s.107
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• pp.151-158
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• 2007

Quadtree, which is a hierarchical data structure, is a very important data structure to represent images. The linear quadtree representation as a way to store a quadtree is efficient to save space compared with other representations. Therefore, it has been widely studied to develop efficient algorithms to execute operations related with quadtrees. The computation of block location is one of important geometry operations in image processing, which extracts a component completely including a given block. In this paper, we present a constant time algorithm to compute the block location of images represented by quadtrees, using three-dimensional $n\times n\times n$ processors on RMESH(Reconfigurable MESH). This algorithm has constant-time complexity by using efficient basic operations to deal with the locational codes of quardtree on the hierarchical structure of $n\times n\times n$ RMESH.

• The Transactions of the Korea Information Processing Society
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• v.4 no.11
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• pp.2786-2800
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• 1997

In this paper, we investigate how well the channel memory (statistical dependence in the occurrence of transmission errors) can be used in the evaluation of widely used error control schemes. For this we assume a special case named as the simplest Markovian block-error pattern with two states, in which each block is classified into two classes of whether the block transmission is in error or not. We apply the derived pattern to the performance evaluation of the practical link-level procedures, LAPB/D/M with multi-reject options, and investigate both throughput and user-perceived response time behaviors on the discrete-time domain to determine how much the performance of error recovery action is improved under burst error condition. Through numerical examples, we show that the simplest Markovian block-error pattern tends to be superior in throughput and delay characteristics to the random error case. Also, instead of mean alone, we propose a new measure of the response time specified as mean plus two standard deviations 50 as to consider user-perceived worst cases, and show that it results in much greater sensitivity to parameter variations than does mean alone.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.755-758
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• 2001

In this paper. Ive propose a postprocessing technique based on the theory of projection on convex sets(POCS) to reduce the blocking artifacts in HDTV decoded images. In BDCT of HDTV. the image is divided into a grid of non-overlapped 8 ${\times}$ 8 blocks. and then each block is coded separately. A block which is located one pixel apart from the grid of BDCT will include the boundary of the original 8 ${\times}$ 8 block. If the blocking artifact is Introduced alone the block boundary. this block will have different frequency characteristic from that of the original block. Thus, a comparison of frequency characteristics of these two overlapping blocks can detect the undesired high-frequency components mainly caused by the blocking artifact. By eliminating these undesired high-frequency components adaptively, robust smoothing projection operator can be obtained. Simulation results with real image sequences indicate that the proposed method performs better than conventional algorithms.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.3
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• pp.543-552
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• 1994

Dynamic Time Warp(DTW) needs for iterative calculations and the design of PE cell suitable for the operations is very important. Accordingly, this paper aims at real time recognition design enables large dictionary hardware realization using DTW algorithm. The DTW PE cell separated into three large blocks. "MIN" is the one block for counting accumulated minimum distance. "ADD" block calculates these minimum distances, and "ABS" seeks for the absolute values to the total sum of local distances. Circuit design and verification about the three block have been accomplished, and performed layout '||'&'||' DRC(design rule check) using 1.2 m CMOS N-Well rule base.CMOS N-Well rule base.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.3
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• pp.21-28
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• 2016

Compressed sensing is a signal processing technique for efficiently acquiring and reconstructing in an under-sampled (i.e., under Nyquist rate) representation. Specially, a block compressed sensing with Smoothed Projected Landweber (BCS-SPL) framework is one of the most widely used schemes. Currently, a variety of BCS-SPL schemes have been actively studied. However, when restoring, block sizes have effects on the reconstructed visual qualities, and in this paper, both a basic scheme of BCS-SPL and several modified schemes of BCS-SPL with structured measurement matrix are analyzed for the effects of the block sizes on the performances of reconstructed image qualities. Through several experiments, it is shown that a basic scheme of BCS-SPL provides superior performance in block size 4.

• Smart Media Journal
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• v.8 no.2
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• pp.9-15
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• 2019

Since the computational complexity for hologram generation increases exponentially with respect to the size of the point cloud, parallel processing using CUDA and/or OpenCL library based on multiple GPUs has recently become popular. The CUDA kernel for parallelization needs to consist of threads, blocks, and grids properly in accordance with the number of cores and the memory size in the GPU. In addition, in case of multiple GPU environments, the distribution in grid-by-grid, in block-by-block, or in thread-by-thread is needed according to the number of GPUs. In order to evaluate the performance of CGH generation, we compared the computational speed in CPU, in single GPU, and in multi-GPU environments by gradually increasing the number of points in a point cloud from 10 to 1,000,000. We also present a memory structure design and a calculation method required in the CUDA-based parallel processing to accelerate the CGH (Computer Generated Hologram) generation operation in multiple GPU environments.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.9
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• pp.1180-1186
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• 2020

One of the Embedded systems Tiny Processing Unit (TPU) usually acts in harsh environments like external shock or insufficient power. In these cases, data could be polluted, and cause critical problems. As a solution to data pollution, many embedded systems are using Error Correcting Code (ECC) to protect and restore data. However, ECC processing in TPU increases the overall processing time by increasing the time of instruction fetch which is the bottleneck. In this paper, we propose an architecture of parallelized ECC block to the reduce bottleneck of TPU. The proposed architecture results in the reduction of time 10% compared to the original model, although memory usage increased slightly. The test is evaluated with a matrix product that has various instructions. TPU with proposed parallelized ECC block shows 7% faster than the original TPU with ECC and was able to perform the proposed test accurately.

• The KIPS Transactions:PartB
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• v.14B no.5
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• pp.321-328
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• 2007

In this paper, we propose a fast and dynamic Region-of-Interest coding method using the adaptive code-block discrimination algorithm in JPEG2000 images which complements the implicit ROI coding method and the modified implicit ROI coding method. For reducing the time of discriminating the code block, the proposed method estimates the characteristics of the shape of ROI and makes the shape of boundaries, and classifies the patterns of each code block. The method improves the preferred processing and loss of wavelet coefficients of background within the ROI code blocks by adaptively classifying the code blocks with the percentage of content of the wavelet coefficients using the thresholds of ROI and background. Also, the priority control of wavelet coefficients of background within ROI code block supports the rapid ROI coding by processing in batch based on patterns unlike the existing methods that process with unit of wavelet coefficients. To show the usefulness of this method, we compared this to the existing methods. There is no difference in performance, but we confirmed very speedy in processing time.

• Journal of Korea Foundry Society
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• v.30 no.4
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• pp.130-136
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• 2010

Sulfide segregation behavior, characteristics of solidification microstructure and compositional distribution in the riser/castings junction of heavy-section main bearing support (MBS) steel castings were investigated; Sulfide streaks of A segregation were formed in the transitional region from columnar grain to coarse equiaxed grain and floated with aggregation of the dendritic free crystal. Solute segregation behaviors of elements Si, P and S were V shape negative segregation from the bottom of the castings to upper part of the riser with the reference of vertical center-line of the specimen block. Those of elements C and Mn were V shape negative segregation in the main body and A shape positive segregation in the riser of the casting. Just beneath the pipe shrinkage in the riser segregation ratio of each element was the highest, and that of S was 3.6 times higher, C 3.3 times, P 2.1 times, Si 1.6 times and Mn 1.0 times respectively. [Mn/S] ratio of the specimen block was distributed in the wide range of 20~275.

• Journal of Welding and Joining
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• v.34 no.2
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• pp.11-15
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• 2016

FE analyses for weldment of ship structure are required for various reasons such as stress concentration for bead tow, residual stress and distortion after welding, and hydrogen diffusion for prediction of low temperature crack. These analyses should be done by solid element modeling, but most of ship structures are modeled by shell element. If we are able to make solid element in the shell element FE modeling it is easily to solve the requirement for solid elements in weld analysis of large ship structures. As the nodes of solid element cannot take moments from nodes of shell element, these two kinds of element cannot be used in one model by conventional modeling. The PSCM (Perpendicular shell coupling method) can connect shell to solid. This method uses dummy perpendicular shell element for transferring moment from shell to solid. The target of this study is to develop a FE pre-processing system applicable at welding at ship structure by using PSCM. We also suggested glue-contact technique for controlling element numbers and element qualities and applied it between PSCM and solid element in automatic pre-processing system. The FE weldment modeling through developed pre-processing system will have rational stiffness of adjacent regions. Then FE results can be more reliable when turn-over of ship-block with semi-welded state or ECA (Engineering critical assessment) of weldment in a ship-block are analyzed.