• Title/Summary/Keyword: block design

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Identity-Based Key Agreement Protocol Employing a Symmetric Balanced Incomplete Block Design

  • Shen, Jian;Moh, Sangman;Chung, Ilyong
    • Journal of Communications and Networks
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    • v.14 no.6
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    • pp.682-691
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    • 2012
  • Key agreement protocol is a fundamental protocol in cryptography whereby two or more participants can agree on a common conference key in order to communicate securely among themselves. In this situation, the participants can securely send and receive messages with each other. An adversary not having access to the conference key will not be able to decrypt the messages. In this paper, we propose a novel identity-based authenticated multi user key agreement protocol employing a symmetric balanced incomplete block design. Our protocol is built on elliptic curve cryptography and takes advantage of a kind of bilinear map called Weil pairing. The protocol presented can provide an identification (ID)-based authentication service and resist different key attacks. Furthermore, our protocol is efficient and needs only two rounds for generating a common conference key. It is worth noting that the communication cost for generating a conference key in our protocol is only O($\sqrt{n}$) and the computation cost is only O($nm^2$), where $n$ implies the number of participants and m denotes the extension degree of the finite field $F_{p^m}$. In addition, in order to resist the different key attack from malicious participants, our protocol can be further extended to provide the fault tolerant property.

The Design of RF Active Bandpass Filters using Active Impedance Inverters (능동 임피던스 인버터를 이용한 RF 능동 대역 통과 여파기의 설계)

  • 전영훈;윤상원
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.5
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    • pp.672-679
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    • 1999
  • This paper describes the design method of active bandpass filters which employ active impedance inverters. Several authors have reported active bandpass filters. However, the functional description of the active blocks in the filters have not been throughly studied. In this paper, the active inverter block of the bandpass filter has is analyzed in the view point of filter design. The designed 3-pole bandwidth filter has its insertion gain of 24 dB at the center frequency of 865 MHz with 75 MHz bandwidth. The noise figure of the active bandpass filter is less than 2.5 dB within its passband.

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The Sensory Evaluation of Bread with Added $\alpha$-Azuki bean Powder for Manufacturing Small Red Bean Bread by Balanced Incomplete Block Design ($\alpha$-팥 분말 첨가 식빵 제조를 위한 균형된 불완비 블록법에 의한 관능 평가)

  • 고광진
    • Journal of the East Asian Society of Dietary Life
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    • v.5 no.3
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    • pp.239-246
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    • 1995
  • This study was prepared to optimize $\alpha$-azuki bean powder content by sensory evaluation method when manufacturing bread with added $\alpha$-azuki bean powder. These sensory characteristics were designed to investigate sensory evaluation about appearance, color, texture, taste and overall acceptability of small red bean bread by balanced incomplete block design. According to evaluated mean of adjusted treatments, appearance was represented high value in bread with added 3% and 6% $\alpha$-azuki bean powder than bread without $\alpha$-azuki bean powder. Bread without $\alpha$-azuki bean powder was revealed maximum sensory score value of color among whole treatments and vread with added 6% $\alpha$-azuki bean powder was revealed second highest sensory value. As $\alpha$-azuki bean powder content increased, sensory score of texture, taste and overall acceptability increased. and bread added 12% $\alpha$-azuki bean powder revealed maximum sensory score. On the results of this research about sensory characteristics for manufacturing bread with added $\alpha$-azuki bean powder, bread with added $\alpha$-azuki bean powder was considered optimum when12% $\alpha$-azuki bean powder was added wheat flour because of highest score of texture, taste and overall acceptability in spite of lower score of appearance and color.

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Synchronous Distributed Load Balancing Algorithm Employing SBIBD (SBIBD를 이용한 분산시스템의 부하 균형 알고리즘)

  • 김성열
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.2
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    • pp.386-393
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    • 2004
  • In order to maintain load balancing in distributed systems in a decentralized manner, every node should obtain workload information from all the nodes on the network. It requires $Ο({v^2})$ traffic overheads, where v is the number of nodes. This paper presents a new synchronous dynamic distributed load balancing algorithm for a ( v,k+1,1)-configured network topology, which is a kind of 2k regular graph, based on symmetric balanced incomplete block design, where v equals ${k^2}+k+1$. Our algorithm needs only Ο(v√v) message overheads and each node receives workload information from all the nodes without redundancy. And load balancing in this algorithm is maintained so that every link has same amount of traffic by √v for transferring workload information.

Implementation of Low Complexity FFT, ADC and DAC Blocks of an OFDM Transmitter Receiver Using Verilog

  • Joshi, Alok;Gupta, Dewansh Aditya;Jaipuriyar, Pravriti
    • Journal of Information Processing Systems
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    • v.15 no.3
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    • pp.670-681
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    • 2019
  • Orthogonal frequency division multiplexing (OFDM) is a system which is used to encode data using multiple carriers instead of the traditional single carrier system. This method improves the spectral efficiency (optimum use of bandwidth). It also lessens the effect of fading and intersymbol interference (ISI). In 1995, digital audio broadcast (DAB) adopted OFDM as the first standard using OFDM. Later in 1997, it was adopted for digital video broadcast (DVB). Currently, it has been adopted for WiMAX and LTE standards. In this project, a Verilog design is employed to implement an OFDM transmitter (DAC block) and receiver (FFT and ADC block). Generally, OFDM uses FFT and IFFT for modulation and demodulation. In this paper, 16-point FFT decimation-in-frequency (DIF) with the radix-2 algorithm and direct summation method have been analyzed. ADC and DAC in OFDM are used for conversion of the signal from analog to digital or vice-versa has also been analyzed. All the designs are simulated using Verilog on ModelSim simulator. The result generated from the FFT block after Verilog simulation has also been verified with MATLAB.

Design and Implementation of PS-Block Timing Model Using PS-Block Structue (PS-Block 구조를 사용한 PS-Block Timing Model의 설계 및 구현)

  • Kim Yun-Kwan;Shin Won;Chang Chun-Hyon;Kim Tae-Wan
    • The KIPS Transactions:PartD
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    • v.13D no.3 s.106
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    • pp.399-404
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    • 2006
  • A real-time system is used for various systems from small embedded systems to distributed enterprise systems. Because it has a characteristic that provides a service on time, developers should make efforts to keep this property about time when developing real-time applications. As the result of research about real-time system indicates, TMO model supports various functions for time processing according to the real-time concept. And it guarantees response time which developers defined. So developers need a point of reference to define deadline and check the correctness of time. This paper proposes an improved PS-Block as an infrastructure of analysis tools for TMO to present a point of reference. There is a problem that the existing PS-Block has overhead caused by a policy making duplicated blocks. As such, this paper implements a PS-Block Timing Model to reduce the overhead due to block duplication, and defines a base class for searching in PS-Block. The PS-Block Timing Model, using an improved PS-Block structure, offers a point of reference of deadline and an infrastructure of execution time analysis according to the PS-Block configuration policy. Therefore, TMO developers can easily verify deadline of real-time methods, and improve reliability, and reduce development terms.

Alternative Analysis of Reliability Design using Redundancy Technique (리던던시 기법을 활용한 신뢰성 설계 대안 분석)

  • Seo, Yang Woo;Lim, Jae Hoon;Yoon, Jung Hwan;Nam, Hyun Woo;Woo, Yeon Jeong
    • Journal of the Korean Society of Systems Engineering
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    • v.17 no.1
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    • pp.1-10
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    • 2021
  • In this paper we proposed the alternative analysis of reliability design using redundancy technique. First, we presented the process for establishing the reliability design alternative analysis process considering the active redundancy and the standby redundancy. and then, the case analysis of A driving equipment was performed in accordance with the reliability design alternative analysis process presented. In case the series reliability design result is not met with the reliability target value. so, the target item for redundancy design of A driving equipment were selected as items with a severity of two or higher. The redundancy design applied with active and standby redundancy techniques were analyzed using BlockSim software. As a result, it was analyzed that reliability design to active redundancy with one of two elements required for A driving equipment is the most efficient compared to the target value of reliability. The results of this study can be usefully used before the reliability design is performed.

Design of Sigma Filter in DCT Domain and its application (DCT영역에서의 시그마 필터설계와 응용)

  • Kim, Myoung-Ho;Eom, Min-Young;Choe, Yoon-Sik
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.178-180
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    • 2004
  • In this work, we propose new method of sigma filtering for efficient filtering and preserving edge regions in DCT Domain. In block-based image compression technique, the image is first divided into non-overlapping $8{\times}8$ blocks. Then, the two-dimensional DCT is computed for each $8{\times}8$ block. Once the DCT coefficients are obtained, they are quantized using a specific quantization table. Quantization of the DCT coefficients is a lossy process, and in this step, noise is added. In this work, we combine IDCT matrix and filter matrix to a new matrix to simplify filtering process to remove noise after IDCT in spatial domain, for each $8{\times}8$ DCT coefficient block, we determine whether this block is edge or homogeneous region. If this block is edge region, we divide this $8{\times}8$ block into four $4{\times}4$ sub-blocks, and do filtering process for sub-blocks which is homogeneous region. By this process, we can remove blocking artifacts efficiently preserving edge regions at the same time.

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