• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.2
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• pp.65-77
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• 2009

This paper proposes fast image processing algorithms using SSE (Streaming SIMD Extensions) instructions. The CPU's supporting SSE instructions have 128bit XMM registers; data included in these registers are processed at the same time with the SIMD (Single Instruction Multiple Data) mode. This paper develops new SIMD image processing algorithms for Mean filter, Sobel horizontal edge detector, and Morphological erosion operation which are most widely used in automated optical inspection systems and compares their processing times. In order to objectively evaluate the processing time, the developed algorithms are compared with OpenCV 1.0 operated in SISD (Single Instruction Single Data) mode, Intel's IPP 5.2 and MIL 8.0 which are fast image processing libraries supporting SIMD mode. The experimental result shows that the proposed algorithms on average are 8 times faster than the SISD mode image processing library and 1.4 times faster than the SIMD fast image processing libraries. The proposed algorithms demonstrate their applicability to practical image processing systems at high speed without commercial image processing libraries or additional hardwares.

• Journal of IKEEE
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• v.24 no.1
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• pp.25-32
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• 2020

In this paper, we propose an image generator for OLED panel test that can compensate for color coordinates and luminance by using panel defect inspection and optical measurement while displaying images on OLED panel. The proposed image generator consists of two processes: the image generation process and the process of compensating color coordinates and luminance using optical measurement. In the image generating process, the panel is set to receive the panel information to drive the panel, and the image is output by adjusting the output setting of the image generator according to the panel information. The output form of the image is configured by digital RGB method. The pattern generation algorithm inside the image generator outputs color and gray image data by transmitting color data to a 24-bit data line based on a synchronization signal according to the resolution of the panel. The process of compensating color coordinates and luminance using optical measurement outputs an image to an OLED panel in an image generator, and compensates for a portion where color coordinates and luminance data measured by an optical module differ from reference data. To evaluate the accuracy of the image generator for the OLED panel test proposed in this paper, Xilinx's Spartan 6 series XC6SLX25-FG484 FPGA was used and the design tool was ISE 14.5. The output of the image generation process was confirmed that the target setting value and the simulation result value for the digital RGB output using the oscilloscope matched. Compensating the color coordinates and luminance using optical measurements showed accuracy within the error rate suggested by the panel manufacturer.

• Journal of the Korea Society of Computer and Information
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• v.26 no.11
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• pp.1-9
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• 2021

3D-NAND flash memory provides high capacity per unit area by stacking 2D-NAND cells having a planar structure. However, due to the nature of the lamination process, there is a problem that the frequency of error occurrence may vary depending on each layer or physical cell location. This phenomenon becomes more pronounced as the number of write/erase(P/E) operations of the flash memory increases. Most flash-based storage devices such as SSDs use ECC for error correction. Since this method provides a fixed strength of data protection for all flash memory pages, it has limitations in 3D NAND flash memory, where the error rate varies depending on the physical location. Therefore, in this paper, pages and layers with different error rates are classified into clusters through the K-means machine learning algorithm, and differentiated data protection strength is applied to each cluster. We classify pages and layers based on the number of errors measured after endurance test, where the error rate varies significantly for each page and layer, and add parity data to stripes for areas vulnerable to errors to provides differentiate data protection strength. We show the possibility that this differentiated data protection policy can contribute to the improvement of reliability and lifespan of 3D NAND flash memory compared to the protection techniques using RAID-like or ECC alone.

• The KIPS Transactions:PartA
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• v.13A no.2 s.99
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• pp.123-136
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• 2006

The prefetching technique is an effective way to reduce the latency caused memory access. However, excessively aggressive prefetch not only leads to cache pollution so as to cancel out the benefits of prefetch but also increase bus traffic leading to overall performance degradation. In this thesis, a prefetch filtering scheme is proposed which dynamically decides whether to commence prefetching by referring a filtering table to reduce the cache pollution due to unnecessary prefetches In this thesis, First, prefetch hashing table 1bitSC filtering scheme(PHT1bSC) has been shown to analyze the lock problem of the conventional scheme, this scheme such as conventional scheme used to be N:1 mapping, but it has the two state to 1bit value of each entries. A complete block address table filtering scheme(CBAT) has been introduced to be used as a reference for the comparative study. A prefetch block address lookup table scheme(PBALT) has been proposed as the main idea of this paper which exhibits the most exact filtering performance. This scheme has a length of the table the same as the PHT1bSC scheme, the contents of each entry have the fields the same as CBAT scheme recently, never referenced data block address has been 1:1 mapping a entry of the filter table. On commonly used prefetch schemes and general benchmarks and multimedia programs simulates change cache parameters. The PBALT scheme compared with no filtering has shown enhanced the greatest 22%, the cache miss ratio has been decreased by 7.9% by virtue of enhanced filtering accuracy compared with conventional PHT2bSC. The MADT of the proposed PBALT scheme has been decreased by 6.1% compared with conventional schemes to reduce the total execution time.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.2
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• pp.618-633
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• 2014

Relay technology is becoming more important for mobile communications and wireless internet of things (IoT) networking because of the extended access network coverage range and reliable quality of service (QoS) it can provide at low power consumption levels. Existing mobile multihop relay (MMR) technology uses fixed-point stationary relay stations (RSs) and a divided time-frame (or frequency-band) to support the relay operation. This approach has limitations when a local fixed-point stationary RS does not exist. In addition, since the time-frame (or frequency-band) channel resources are pre-divided for the relay operation, there is no way to achieve high channel utilization using intelligent opportunistic techniques. In this paper, a different approach is considered, where the use of mobile/IoT devices as RSs is considered. In applications that use mobile/IoT devices as relay systems, due to the very limited battery energy of a mobile/IoT device and unequal channel conditions to and from the RS, both minimum energy consumption and QoS support must be considered simultaneously in the selection and configuration of RSs. Therefore, in this paper, a mobile RS is selected and configured with the objective of minimizing power consumption while satisfying end-to-end data rate and bit error rate (BER) requirements. For the RS, both downlink (DL) to the destination system (DS) (i.e., IoT device or user equipment (UE)) and uplink (UL) to the base station (BS) need to be adaptively configured (using adaptive modulation and power control) to minimize power consumption while satisfying the end-to-end QoS constraints. This paper proposes a minimum transmission power consuming RS selection and configuration (MPRSC) scheme, where the RS uses cognitive radio (CR) sub-channels when communicating with the DS, and therefore the scheme is named MPRSC-CR. The proposed MPRSC-CR scheme is activated when a DS moves out of the BS's QoS supportive coverage range. In this case, data transmissions between the RS and BS use the assigned primary channel that the DS had been using, and data transmissions between the RS and DS use CR sub-channels. The simulation results demonstrate that the proposed MPRSC-CR scheme extends the coverage range of the BS and minimizes the power consumption of the RS through optimal selection and configuration of a RS.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6B
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• pp.1134-1141
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• 1999

In this paper, we implement an optical code division multiple access(OCDMA) system and analyze the performance of the implemented system. In the implemented system, a transmitter encodes input data into optical pulses by using laser diode, and spreads the encoded pulses in an encoder which consists of 4 stage delay lines. The decoder which is the same structure as that of encoder delays and combines the spreaded pulses, and thus recovers the original data. At first, we discuss the auto- and cross-correlations of OCDMA signals under both environments of single user and multi-users, and then verify the simulation results with experimental results. We also evaluate the effect of a number of stages of delay line and code length on the system performance through computer simulations. As experimental results we can see that if the decoder have the same configuration as that of encoder, the peak auto-correlation characteristics can be achieved, and thus we can recover the original data from received data. As simulation results we can see that although bit error rate decreases as code length decreases or the number of stage of delay line increases, it is difficult to implement the system because the pulse width becomes narrow. From the results, we can apply CDMA technologies to optical communication networks.

• Magazine of the Korea Concrete Institute
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• v.10 no.6
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• pp.335-343
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• 1998

Recently, new experimental criteria for reinforced concrete frame structures in high seismic regions have been reported in United States. The objective of the criteria is to get more reliable test data which are valid to compare with other test data done by different researchers. The criteria precribe test method of specimens, analysis method of test data, and limiting values needed to specimens like drift angle, energey dissipation ratio, stiffness, and strength. These criteria might be usefel to get objective conclusion. Shear wall structures, which belong to one of earthquake resisting systems, also need this kind of criteria. But, the general response of shear wall structures is a little bit different from that of frame structures since shear wall restrains the horizontal displacement caused by horizontal force and increases the stiffness and strength. The objective of this paper is to propose a criterion for limiting drift and energy dissipation ratio of shear walls based on structural testing. These are the most important values for presenting the capacity of shear walls. Limiting drift and energy dissipation ratios were examined for tests on shear walls having ductile type failures. Test data were analyzed and compared to the results for a suggested acceptance criteria that involve a limiting drift that is a function of aspect ratio and a limiting energy dissipation ratio that is a function of displacement ductility and damping.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.105-113
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• 2013

RAID systems have been widely used by connecting several disks in parallel structure. to resolve the delay and bottleneck of data I/O. Recently, SSD based RAID systems are emerging since SSDs have better I/O performance than HDD. However, endurance and power consumption problems due to frequent write operation in SSD based RAID system should be resolved. In this paper, we propose a de-duplication method of parity disk in SSD based RAID system with expensive update cost. The proposed method segments chunk of parity data into small pieces and removes duplicate data, therefore, it can reduce wear-leveling and power consumption by decreasing write operation for duplicated parity data. Experimental results show that bit update rate of the proposed method is 16% in total disk, 31% in parity disk less than that of existing method in RAID-6 system using EVENODD erasure code, and the power consumption of the proposed method is 30% less than that of existing method. Besides the proposed method is 12% in total disk, 32% in parity disk less than that of existing method in RAID-5 system, and the power consumption of the proposed method is 36% less than that of existing method.

• Journal of the Institute of Convergence Signal Processing
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• v.13 no.4
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• pp.220-232
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• 2012

In this paper, we investigate the correlation result due to the problems of delay tracking and fringe rotation module in the VCS(VLBI Correlation Subsystem). The VCS, FX-type correlator, adopts the delay tracking and fringe rotation module in order to compensate the delay change and fringe phase of wave signal from the radio source by Doppler's effect. The phase of observed data is also compensated by means of delay tracking and fringe rotation in the correlator, but we confirmed that the phase is unstable by applying long integration period of AIPS(Astronomical Image Processing System) rather than correlator. And the delay value of observed data has the errors of several tens nanoseconds than normal case at the analysis of correlation result. In addition, we found that the phase of correlation results is not connected as the unit of FFT-segment because the initial fringe phase at the fringe rotation module is not correctly determined. In this paper, in order to solve these problems, the original direction of 90 degree phase jump is reversely modified when the bit-shift occurred at the delay tracking. And the initial fringe phase at the fringe rotation module is correctly modified by using the initial phase of observed data. In addition, the parameter calculation module was abnormally operated as designed in the fringe rotation. So, the logical program by the VCS is modified so as to calculate the parameters correctly. Through the experiments of correlation processing over the above problems, the modified proposal algorithm is adequately corrected to the data analysis results, so that the experimental results make it clear for us to operate the developed VCS hardware correlator normally.

• Journal of the Korea Society of Computer and Information
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• v.16 no.6
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• pp.21-30
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• 2011

In the global IT market, a lot of issues for responding to various environmental regulations emerged. In case of the data centers, it is consuming huge amounts of energy to maintain. So there have been various technical attempts as Consolidation, Virtualization, Optimization to efficiently manage energy and data storage to fix the problems. In this paper, we propose a new RAID(Redundant Array of Independent Disks) mechanism which is differing the intensity of power consumption and works to provide data protection and disaster recovery(backup, mirroring etc.) to stratify multiple volumes. G-RAID minimize the power consumption and the lower of I/O performance by selecting the volume depending on the frequency of data access while classifying the power consumption between volumes in storage system. Also, it is possible that a filesystem and block map information of G-RAID is processed by basic unit which is group located in a row for the blocks to work efficiently and can minimize the performance degradation of block mapping load by the access frequency in each groups. As a result, we obtained to elevate a little bit of response time caused by block relocation work, but showed the decrease of power consumption by 38%.