• Title/Summary/Keyword: barrier lowering

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Comparison of Electrical Properties between Sputter Deposited Au and Cu Schottky Contacts to n-type Ge

  • Kim, Hogyoung;Kim, Min Kyung;Kim, Yeon Jin
    • Korean Journal of Materials Research
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    • v.26 no.10
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    • pp.556-560
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    • 2016
  • Using current-voltage (I-V) and capacitance-voltage (C-V) measurements, the electrical properties of Au and Cu Schottky contacts to n-Ge were comparatively investigated. Lower values of barrier height, ideality factor and series resistance were obtained for the Au contact as compared to the Cu contact. The values of capacitance showed strong dependence on the bias voltage and the frequency. The presence of an inversion layer at the interface might reduce the intercept voltage at the voltage axis, lowering the barrier height for C-V measurements, especially at lower frequencies. In addition, a higher interface state density was observed for the Au contact. The generation of sputter deposition-induced defects might occur more severely for the Au contact; these defects affected both the I-V and C-V characteristics.

Built-in voltage in organic light-emitting diodes from the measurement of modulated photocurrent (변조 광전류 측정법을 이용하여 전극 변화에 따른 유기발광소자의 내장 전압)

  • Lee, Eun-Hye;Yoon, Hee-Myoung;Han, Wone-Keun;Kim, Tae-Wan;Ahn, Joon-Ho;Oh, Hyun-Seok;Jang, Kyung-Uk;Chung, Dong-Hoe
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.51-52
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    • 2007
  • Built-in voltage in organic light-emitting diodes was studied using modulated photocurrent technique ambient conditions. From the bias voltage-dependent photocurrent, built-in voltage of the device is determined. The applied bias voltage when the magnitude of modulated photo current is zero corresponds to a built-in voltage. Built-in voltage in the device is generated due to a difference of work function of the anode and cathode. A device was made with a structure of anode/$Alq_3$/cathode to study a built-in voltage. ITO and ITO/PEDOT:PSS were used as an anode, and Al and LiF/AI were used as a cathode. It was found that an incorporation of PEDOT:PSS layer between the ITO and $Alq_3$ increases a built-in voltage by about 0.4V. This is consistent to a difference of a highest occupied energy states of ITO and PEDOT:PSS. This implies that a use of PEDOT:PSS layer in anode improves the efficiency of the device because of a lowering of anode barrier height. With a use bilayer cathode system LiF/Al, it was found that the built-in voltage increases as the LiF layer thickness increases in the thickness range of 0~1nm. For 1nm thick LiF layer, there is a lowering of electron barrier by about 0.2eV with respect to an Al-only device. It indicates that a very thin alkaline metal compound LiF lowers an electron barrier height.

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Electrical Characteristics and Deep Level Traps of 4H-SiC MPS Diodes with Different Barrier Heights (전위 장벽에 따른 4H-SiC MPS 소자의 전기적 특성과 깊은 준위 결함)

  • Byun, Dong-Wook;Lee, Hyung-Jin;Lee, Hee-Jae;Lee, Geon-Hee;Shin, Myeong-Cheol;Koo, Sang-Mo
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.306-312
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    • 2022
  • We investigated electrical properties and deep level traps in 4H-SiC merged PiN Schottky (MPS) diodes with different barrier heights by different PN ratios and metallization annealing temperatures. The barrier heights of MPS diodes were obtained in IV and CV characteristics. The leakage current increased with the lowering barrier height, resulting in 10 times larger current. Additionally, the deep level traps (Z1/2 and RD1/2) were revealed by deep level transient spectroscopy (DLTS) measurement in four MPS diodes. Based on DLTS results, the trap energy levels were found to be shallow level by 22~28% with lower barrier height It could confirm the dependence of the defect level and concentration determined by DLTS on the Schottky barrier height and may lead to incorrect results regarding deep level trap parameters with small barrier heights.

Characterization of Reverse Leakage Current Mechanism of Shallow Junction and Extraction of Silicidation Induced Schottky Contact Area for 0.15 ${\mu}{\textrm}{m}$ CMOS Technology Utilizing Cobalt Silicide (코발트 실리사이드 접합을 사용하는 0.15${\mu}{\textrm}{m}$ CMOS Technology에서 얕은 접합에서의 누설 전류 특성 분석과 실리사이드에 의해 발생된 Schottky Contact 면적의 유도)

  • 강근구;장명준;이원창;이희덕
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.10
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    • pp.25-34
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    • 2002
  • In this paper, silicidation induced Schottky contact area was obtained using the current voltage(I-V) characteristics of shallow cobalt silicided p+-n and n+-p junctions. In reverse bias region, Poole-Frenkel barrier lowering influenced predominantly the reverse leakage current, masking thereby the effect of Schottky contact formation. However, Schottky contact was conclusively shown to be the root cause of the modified I-V behavior of n+-p junction in the forward bias region. The increase of leakage current in silicided n+-p diodes is consistent with the formation of Schottky contact via cobalt slicide penetrating into the p-substrate or near to the junction area and generating trap sites. The increase of reverse leakage current is proven to be attributed to the penetration of silicide into depletion region in case of the perimeter intensive n+-p junction. In case of the area intensive n+-p junction, the silicide penetrated near to the depletion region. There is no formation of Schottky contact in case of the p+-n junction where no increase in the leakage current is monitored. The Schottky contact amounting to less than 0.01% of the total junction was extracted by simultaneous characterization of forward and reverse characteristics of silicided n+-p diode.

A Study on the Barrier Free Composition of Kindergarten (유치원의 장애물 없는 생활환경 조성에 관한 연구 - 광주광역시를 중심으로 -)

  • Song, Jung-Ran;Lee, Yong-Hwan
    • The Journal of Sustainable Design and Educational Environment Research
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    • v.16 no.3
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    • pp.9-17
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    • 2017
  • This study investigates and analyzes the convenience facilities to strengthen or mitigate the Barrier Free awareness and Kindergarten Barrier Free for the kindergarten school staff and the public facility officials of the education office. In addition, to improve the Barrier Free, the improvement facilities of the kindergarten were investigated and analyzed. First, from the institutional viewpoint, it is necessary to amend the existing regulations of the Act for the Promotion of the Convenience Promotion of Disabled Persons, Elderly and Pregnant Women in Korea, and to change the facilities for duties and recommended installation of the kindergarten and the Barrier Free certification standards. Second, in order to apply the Barrier Free certification system to the kindergarten in terms of facility environment, it is necessary to activate the barrier kind of the kindergarten so as to receive the Barrier Free certification by lowering the score of the items difficult to improve due to the terrain or building structure. Third, the perception of Barrier Free is still not high in terms of social awareness. The purpose of this study is to investigate the method of creating a Barrier Free for a kindergarten in the education and living space of children who are the socially underprivileged. Therefore, based on this study, it is anticipated that it will be an opportunity to promote change of Barrier Free in Kindergarten if an attempt is made to improve the Barrier Free certification index suitable for public kindergarten.

The GaAs Leakage Current Characteristics of GaAs MESFET's using Source Ground Status (GaAs MESFET의 Source 접지상태에 따른 게이트 누설 전류 특성)

  • Won, Chang-Sub;Yu, Young-Han;Ahn, Hyung-Keun;Han, Deuk-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.263-266
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    • 2003
  • The gate leakage current is first calculated using the experimental method between gate and drain by opening source electrode. Next, the gate to drain current has been obtained with a ground source. The difference of two current has been tested and provide that the existence of another source to Schotuy barrier height against the image force lowering effect.

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A SOI Lateral Hybrid BMFET with High Current Gain (높은 전류 이득률을 갖는 SOI 수평형 혼성 BMFET)

  • Kim, Du-Yeong;Jeon, Jeong-Hun;Kim, Seong-Dong;Han, Min-Gu;Choe, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.2
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    • pp.116-119
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    • 2000
  • A hybrid SOI bipolar-mode field effect transistor (BMFET) is proposed to improve the current gain. The device characteristics are analyzed and verified numerically for BMFET mode, DMOS mode, and hybrid mode by MEDICI simulation. The proposed SOI BMFET exhibits 30 times larger current gain in hybrid-mode operation by connecting DMOS gate to the p+ gate of BMFET structure as compared with the conventional structure without sacrifice of breakdown voltage and leakage current characteristics. This is due to the DMOS-gate-induced hybrid effect that lowers the barrier of p-body and reduces the charge in p-body.

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The effect of fullerene on the device performance of organic light-emitting

  • Lee, Jun-Yeob
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1805-1808
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    • 2006
  • In this paper, we describe a versatile use of fullerene(C60) as a charge transporting material for organic light-emitting diodes. The use of fullerene as a buffer layer for an anode, a doping material for hole transport layer, and an electron transport layer was investigated. Fullerene improved the hole injection from an anode to a hole transport layer by lowering the interfacial energy barrier and enhanced the lifetime of the device as a doping material for a hole transport layer. In addition, it was also effective as an electron transporting material to get low driving voltage in the device.

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Gate Leakage Current Characteristics of GaAs MESFETs with Different Temperature (GaAs MESFET의 온도변화에 대한 게이트누설전류 특성)

  • Won, Chang-Sub;Hong, Jea-Il
    • Proceedings of the KIEE Conference
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    • 2003.07e
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    • pp.24-27
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    • 2003
  • In this paper, We make experiment on two methode for GaAs MESFET with temperature variation. One method, we mesure gate leakage current at open source electrode. another we mesure gate leakage current at short source electrode. The difference of two current has been tested and provide that the existence of another source to Schottky barrier height against the image force lowering effect.

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The Fabrication and Characterization of CODE MOSFET (CODE MOSFET 소자의 제작 및 특성)

  • 송재혁;김기홍;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.895-900
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    • 1990
  • With the MOS device scailing down, the substrate concentration must increase in order to avoid punchthrough leakage current due to the DIBL(Drain Induced Barrier Lowering) effect. However the enhancement of the substrate concentration increases source, drain juntion capacitances and substrate current due to hot elelctron, degrading the speed characteristics and reliability of the MOS devices. In this paper, a new device, called CODE(Channel Only Dopant Enhancement) MOS, an its fabrication are proposed. By comparing the fabricated CODE MOSFET with the conventional device, the improvements on DIBL, substrate current and source, drain juntion capacitances are realized.

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