• 전력전자학회논문지
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• 제8권1호
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• pp.64-69
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• 2003

전류모드 제어시 전류루프에는 표본화 효과에 의해 저주파 모델로는 예측하기 어려운 고주파 성분이 존재한다. 본 논문에서는 영전압 스위칭 하프 브리지 컨버터의 정상상태에서의 출력전압 관계식을 구한다 또 이를 바탕으로 전류모드로 제어할 때 전류루프에 존재하는 표본화 효과를 고려하여 저주파 소신호 모델이 예측하기 어려운 고주파 성분의 특성을 표본화 이득을 통하여 더욱 정확히 예측할 수 있는 방법을 제시한다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.395-398
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• 2002

This paper presents generalized small-signal models for complementary driven double-ended isolated converters. The proposed small-signal models include the effect of the parasitic resistances, which have dominant influence on the damping of the secondary Power stage double-pole. To confirm the validity of the new models, an asymmetrical half-bridge converter with confer-taped rectifier and a forward-flyback converter with current doubler rectifier were built, and their performance were compared with the theoretical prediction.

• Journal of Power Electronics
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• 제11권6호
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• pp.824-836
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• 2011

A new fault-tolerant control topology for open-loop motor-drive systems with Delta-connected stator windings is introduced in this paper. This new control topology enables the operation of a three-phase induction machine as a two-phase machine fed by a three-phase inverter upon a failure in one of the motor phases. This topology utilizes the "open-Delta" configuration to independently control the current in each of the two remaining healthy phases. This new control technique leads to the alleviation of any torque pulsations resulting from the consequences of the asymmetrical conditions associated with this class of faults.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 B
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• pp.1242-1244
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• 2000

A new control method using average comparison strategy have been proposed in this paper. This control method realizes sinusoidal input and output current. unity input displacement factor regardless of load power factor. Moreover, compensation of the asymmetrical and/or harmonic containing input voltage is automatically realized, and calculation time of control function is reduced.

• Journal of Power Electronics
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• 제17권1호
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• Journal of Power Electronics
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• 제16권5호
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• pp.1706-1715
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• 2016

In this paper, a single phase modified switched-diode topology for both symmetrical and asymmetrical cascaded multilevel inverters is presented. It consists of a Modified Switched-Diode Unit (MSDU) and a Twin Source Two Switch Unit (TSTSU) to produce distinct positive voltage levels according to the operating modes. An additional H-bridge synthesizes a voltage waveform, where the voltage levels of either polarity have less Total Harmonic Distortion (THD). Higher-level inverters can be built by cascading MSDUs. A comparative analysis is done with other topologies. The proposed topology results in reductions in the number of power switches, losses, installation area, voltage stress and converter cost. The Nearest Level Control (NLC) technique is employed to generate the gating signals for the power switches. To verify the performance of the proposed structure, simulation results are carried out by a PSIM under both steady state and dynamic conditions. Experimental results are presented to validate the simulation results.

• Journal of Power Electronics
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• 제11권4호
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• pp.542-550
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• 2011

This paper describes the design and hardware implementation of a Single Input Fuzzy Logic Controller (SIFLC) to regulate the output voltage of a boost power converter. The proposed controller is derived from the signed distance method, which reduces a multi-input conventional Fuzzy Logic Controller (CFLC) to a single input FLC. This allows the rule table to be approximated to a one-dimensional piecewise linear control surface. A MATLAB simulation demonstrated that the performance of a boost converter is identical when subjected to the SIFLC or a CFLC. However, the SIFLC requires nearly an order of magnitude less time to execute its algorithm. Therefore the former can replace the latter with no significant degradation in performance. To validate the feasibility of the SIFLC, a 50W boost converter prototype is built. The SIFLC algorithm is implemented using an Altera FPGA. It was found that the SIFLC with asymmetrical membership functions exhibits an excellent response to load and input reference changes.

• Journal of Power Electronics
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• 제13권1호
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• pp.70-76
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• 2013

For high power high step-down dc-dc conversion applications, conventional three-level dc-dc converters are subject to extreme duty cycles or increased volume and cost due to the use of transformers. In this paper, a transformerless three-level dc-dc buck converter with a high step-down conversion ratio is proposed. The converter comprises two asymmetrical half bridges, which are of the neutral point clamped structures. Therefore, the output pulse voltage of the converter can be obtained in terms of the voltage difference between the two half bridges. In order to realize harmonious switching of the converter, a modulation strategy with capacitor voltages self balance is presented. According to the deduced output dc voltage function, transformerless operation without extreme duty cycles can be implemented. Experimental results from a 1kW prototype verify the validity of the proposed converter. It is suitable for ship electric power distribution systems.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.203-205
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• 2006

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost-half-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switching mode and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft switching (ZVS) operation ranges and the power dissipation as compared with those of the previously developed high-frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation (PWM) and pulse density modulation (PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• 한국전자파학회논문지
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• 제14권5호
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• pp.450-457
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• 2003

본 논문에서는 RF 전력 증폭기에 전치왜곡 선형화기 적용을 위해 변조 주파수가 전력 증폭기 3차 혼변조 성분의 비대칭성과 이로 인한 혼변조 개선량에 미치는 영향을 연구하였다. 3차 혼변조 성분의 위상 왜곡에 의한 비대칭 정도를 알기 위한 위상 추출 회로를 제안하고, 3차 혼변조 상 .하측 성분에서 추출한 위상차를 보상하기 위한 회로를 설계 및 제작하였다. 본 논문에서 제안한 위상 보상 회로를 PCS 주파수 대역 5 W급 RF 전력 증폭기에 적용한 결과, 1.5 MHz의 변조 주파수($10^{\circ}$ 이내의 위상차) 까지에서 최대의 혼변조 개선 효과를 얻었다.