• Title/Summary/Keyword: asymmetric channel

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Analysis on Bit Error Rate Performance of Negatively Asymmetric Binary Pulse Amplitude Modulation Non-Orthogonal Multiple Access in 5G Mobile Networks

  • Chung, Kyuhyuk
    • International Journal of Advanced Culture Technology
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    • v.9 no.4
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    • pp.307-314
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    • 2021
  • Recently, positively asymmetric binary pulse amplitude modulation (2PAM) has been proposed to improve the bit error rate (BER) performance of the weak channel gain user, with a tolerable BER loss of the strong channel gain user, for non-orthogonal multiple access (NOMA). However, the BER loss of the stronger channel gain user is inevitable in such positively asymmetric 2PAM NOMA scheme. Thus, we propose the negatively asymmetric 2PAM NOMA scheme. First, we derive closed-form expressions for the BERs of the negatively asymmetric 2PAM NOMA. Then, simulations demonstrate that for the stronger channel gain user, the BER of the proposed negatively asymmetric 2PAM NOMA improves, compared to that of the conventional positively asymmetric 2PAM NOMA. Moreover, we also show that for the weaker channel gain user, the BER of the proposed negatively asymmetric 2PAM NOMA is comparable to that of the conventional positively asymmetric 2PAM NOMA, over the power allocation range less than about 10 %.

A 6.4-Gb/s/channel Asymmetric 4-PAM Transceiver for Memory Interface

  • Lee, Kwang-Hun;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.129-131
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    • 2011
  • An 6.4-Gb/s/channel 4-PAM transceiver is designed for a high speed memory application. The asymmetric 4-PAM signaling scheme is proposed to increase the voltage and time margins, and reduces the reference noise effect in a receiver by 33%. To reduce ISI in a channel, 1-tap pre-emphasis of a transmitter is used. The proposed asymmetric 4-PAM transceiver was implemented by using 0.13um 1-poly 6-metal CMOS process with 1.2V supply. The active area and power consumption of 1-charmel transceiver including a PLL are $0.294um^2$ and 6mW, respectively.

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Channel Doping Concentration Dependent Threshold Voltage Movement of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 도핑농도에 대한 문턱전압이동)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.9
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    • pp.2183-2188
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    • 2014
  • This paper has analyzed threshold voltage movement for channel doping concentration of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is generally fabricated with low doping channel and fully depleted under operation. Since impurity scattering is lessened, asymmetric DGMOSFET has the adventage that high speed operation is possible. The threshold voltage movement, one of short channel effects necessarily occurred in fine devices, is investigated for the change of channel doping concentration in asymmetric DGMOSFET. The analytical potential distribution of series form is derived from Possion's equation to obtain threshold voltage. The movement of threshold voltage is investigated for channel doping concentration with parameters of channel length, channel thickness, oxide thickness, and doping profiles. As a result, threshold voltage increases with increase of doping concentration, and that decreases with decrease of channel length. Threshold voltage increases with decrease of channel thickness and bottom gate voltage. Lastly threshold voltage increases with decrease of oxide thickness.

A Partial Response Maximum Likelihood Detection Using Modified Viterbi Decoder for Asymmetric Optical Storage Channels

  • Lee, Kyu-Suk;Lee, Joo-Hyun;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.7C
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    • pp.642-646
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    • 2005
  • We propose an improved partial response maximum likelihood (PRML) detector with the branch value compensation of Viterbi decoder for asymmetric high-density optical channel. Since the compensation value calculated by a survival path is applied to each branch metric, it reduces the detection errors by the asymmetric channel. The proposed PRML detection scheme improves the detection performance on the $2^{nd},\;3^{rd}\;and\;4^{th}$ order PR targets for asymmetric optical recording channel.

Analytical Model for the Threshold Voltage of Long-Channel Asymmetric Double-Gate MOSFET based on Potential Linearity (전압분포의 선형특성을 이용한 Long-Channel Asymmetric Double-Gate MOSFET의 문턱전압 모델)

  • Yang, Hee-Jung;Kim, Ji-Hyun;Son, Ae-Ri;Kang, Dae-Gwan;Shin, Hyung-Soon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.1-6
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    • 2008
  • A compact analytical model of the threshold voltage for long-channel Asymmetric Double-Gate(ADG) MOSFET is presented. In contrast to the previous models, channel doping and carrier quantization are taken into account. A more compact model is derived by utilizing the potential distribution linearity characteristic of silicon film at threshold. The accuracy of the model is verified by comparisons with numerical simulations for various silicon film thickness, channel doping concentration and oxide thickness.

Dependence of Drain Induced Barrier Lowering for Ratio of Channel Length vs. Thickness of Asymmetric Double Gate MOSFET (비대칭 DGMOSFET에서 채널길이와 두께 비에 따른 DIBL 의존성 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.6
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    • pp.1399-1404
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    • 2015
  • This paper analyzed the phenomenon of drain induced barrier lowering(DIBL) for the ratio of channel length vs. thickness of asymmetric double gate(DG) MOSFET. DIBL, the important secondary effect, is occurred for short channel MOSFET in which drain voltage influences on potential barrier height of source, and significantly affects on transistor characteristics such as threshold voltage movement. The series potential distribution is derived from Poisson's equation to analyze DIBL, and threshold voltage is defined by top gate voltage of asymmetric DGMOSFET in case the off current is 10-7 A/m. Since asymmetric DGMOSFET has the advantage that channel length and channel thickness can significantly minimize, and short channel effects reduce, DIBL is investigated for the ratio of channel length vs. thickness in this study. As a results, DIBL is greatly influenced by the ratio of channel length vs. thickness. We also know DIBL is greatly changed for bottom gate voltage, top/bottom gate oxide thickness and channel doping concentration.

Influence of Tunneling Current on Threshold voltage Shift by Channel Length for Asymmetric Double Gate MOSFET (비대칭 DGMOSFET에서 터널링 전류가 채널길이에 따른 문턱전압이동에 미치는 영향)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.7
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    • pp.1311-1316
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    • 2016
  • This paper analyzes the influence of tunneling current on threshold voltage shift by channel length of short channel asymmetric double gate(DG) MOSFET. Tunneling current significantly increases by decrease of channel length in the region of 10 nm below, and the secondary effects such as threshold voltage shift occurs. Threshold voltage shift due to tunneling current is not negligible even in case of asymmetric DGMOSFET to develop for reduction of short channel effects. Off current consists of thermionic and tunneling current, and the ratio of tunneling current is increasing with reduction of channel length. The WKB(Wentzel-Kramers-Brillouin) approximation is used to obtain tunneling current, and potential distribution in channel is hermeneutically derived. As a result, threshold voltage shift due to tunneling current is greatly occurred for decreasing of channel length in short channel asymmetric DGMOSFET. Threshold voltage is changing according to bottom gate voltages, but threshold voltage shifts is nearly constant.

Threshold Voltage Movement for Channel Doping Concentration of Asymmetric Double Gate MOSFET (도핑농도에 따른 비대칭 이중게이트 MOSFET의 문턱전압이동현상)

  • Jung, Hakkee;Lee, jongin;Jeong, Dongsoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.748-751
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    • 2014
  • This paper has analyzed threshold voltage movement for channel doping concentration of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is generally fabricated with low doping channel and fully depleted under operation. Since impurity scattering is lessened, asymmetric DGMOSFET has the adventage that high speed operation is possible. The threshold voltage movement, one of short channel effects necessarily occurred in fine devices, is investigated for the change of channel doping concentration in asymmetric DGMOSFET. The analytical potential distribution of series form is derived from Possion's equation to obtain threshold voltage. The movement of threshold voltage is investigated for channel doping concentration with parameters of channel length, channel thickness, oxide thickness, and doping profiles. As a result, threshold voltage increases with increase of doping concentration, and that decreases with decrease of channel length. Threshold voltage increases with decrease of channel thickness and bottom gate voltage. Lastly threshold voltage increases with decrease of oxide thickness.

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Tunneling Current of Sub-10 nm Asymmetric Double Gate MOSFET for Channel Doping Concentration (10 nm 이하 비대칭 DGMOSFET의 채널도핑농도에 따른 터널링 전류)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.7
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    • pp.1617-1622
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    • 2015
  • This paper analyzes the ratio of tunneling current for channel doping concentration of sub-10 nm asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current in subthreshold region increases in the region of channel length of 10 nm below. Even though asymmetric DGMOSFET is developed to reduce short channel effects, the increase of tunneling current in sub-10 nm is inevitable. As the ratio of tunneling current in off current according to channel doping concentration is calculated in this study, the influence of tunneling current to occur in short channel is investigated. To obtain off current to consist of thermionic emission and tunneling current, the analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for channel doping concentration in sub-10 nm asymmetric DGMOSFET, specially with parameters of channel length, channel thickness, and top/bottom gate oxide thickness and voltage.

Generalized Joint Channel-Network Coding in Asymmetric Two-Way Relay Channels

  • Shen, Shengqiang;Li, Shiyin;Li, Zongyan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.12
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    • pp.5361-5374
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    • 2016
  • Combining channel coding and network coding in a physical layer in a fading channel, generalized joint channel-network coding (G-JCNC) is proved to highly perform in a two-way relay channel (TWRC). However, most relevant discussions are restricted to symmetric networks. This paper investigates the G-JCNC protocols in an asymmetric TWRC (A-TWRC). A newly designed encoder used by source nodes that is dedicated to correlate codewords with different orders is presented. Moreover, the capability of a simple common non-binary decoder at a relay node is verified. The effects of a power match under various numbers of iteration and code lengths are also analyzed. The simulation results give the optimum power match ratio and demonstrate that the designed scheme based on G-JCNC in an A-TWRC has excellent bit error rate performance under an appropriate power match ratio.