• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.4
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• pp.388-394
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• 1999

This paper is concerned with an application of Parallel Genetic Algorithms(PGA) to optimal econmic load dispatch(ELD) in power systems. The ELD problem is to minimize the total generation fuel cost of power outputs for all generating units while satisfying load balancing constraints. Genetic Algorithms(GA) is a good candidate for effective parallelization because of their inherent principle of evolving in parallel a population of individuals. Each individual of a population evaluates the fitness function without data exchanges between individuals. In application of the parallel processing to GA, it is possible to use Single Instruction stream, Multiple Data stream(SIMD), a kind of parallel system. The architecture of SIMD system need not data communications between processors assigned. The proposed ELD problem with C code is implemented by SIMSCRIPT language for parallel processing which is a powerfrul, free-from and versatile computer simulation programming language. The proposed algorithms has been tested for 38 units system and has been compared with Sequential Quadratic programming(SQP).

• Journal of Institute of Control, Robotics and Systems
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• v.11 no.1
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• pp.84-91
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• 2005

In this paper, we describe the real-time parallel processing simulator developed for the use of performance analysis of rolling missiles. The real-time parallel processing simulator developed here consists of seeker emulator generating infrared image signal on aircraft, real-time computer, host computer, system unit, and actual equipments such as auto-pilot processor and seeker processor. Software is developed from mathematic models, 6 degree-of-freedom module, aerodynamic module which are resided in real-time computer, and graphic user interface program resided in host computer. The real-time computer consists of six TIC-40 processors connected in parallel. The seeker emulator is designed by using analog circuits coupled with mechanical equipments. The system unit provides interface function to match impedance between the components and processes very small electrical signals. Also real launch unit of missiles is interfaced to simulator through system unit. In order to apply the real-time parallel processing simulator to performance analysis equipment of rolling missiles it is essential to perform the performance verification test of simulator.

• Journal of the Institute of Convergence Signal Processing
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• v.16 no.1
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• pp.1-8
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• 2015

In many image processing tasks, connected component labeling (CCL) is performed to extract regions of interest. CCL was usually done in a sequential fashion when image resolution was relatively low and there are small number of input channels. As image resolution gets higher up to HD or Full HD and as the number of input channels increases, sequential CCL is too time-consuming to be used in real time applications. To cope with this situation, parallel CCL framework was introduced where multiple cores are utilized simultaneously. Several parallel CCL methods have been proposed in the literature. Among them are NSZ label equivalence (NSZ-LE) method[1], modified 8 directional label selection (M8DLS) method[2], and HYBRID1 method[3]. Soh [3] showed that HYBRID1 outperforms NSZ-LE and M8DLS, and argued that HYBRID1 is by far the best. In this paper we propose an improved hybrid parallel CCL algorithm termed as HYBRID2 that hybridizes M8DLS with label backtracking (LB) and show that it runs around 20% faster than HYBRID1 for various kinds of images.

• Journal of Industrial Technology
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• v.10
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• pp.15-20
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• 1990

A parallel processing algorithm for discrete Kalman filter, which is one of the most commonly used filtering technique in modern control, signal processing, and communication, is proposed. Previously proposed parallel algorithms to decrease the number of computations needed in the Kalman filter are the hierachical structures by distributed processing of measurements, or the systolic structures to disperse the computational burden. In this paper, a new parallel Kalman filter employing a structure similar to recursive doubling is proposed. Estimated values of state variables by the new algorithm converge with two times faster data processing speed than that of the conventional Kalman filter. Moreover it maintains the optimality of the conventional Kalman filter.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.10
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• pp.1057-1065
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• 1990

A parallel processing algorithm for the discrete Kalman filter, which is one of the most commonly used filtering techniques in modern control, signal processing, and communication, is proposed. To decrease the number of computations critical in the Kalman filter, previously proposed parallel algorithms are of the hierarchical structure by distributed processing of measurements, or of the systolic structure to disperse the computational burden. In this paper, a new parallel Kalman filter employing a structure similar to recursive doubling is proposed. Estimated valuse of state variables by the new algorithm converge faster to the true values because the new algorithm can process data twice faster than the conventional Kalman filter. Moreover, it maintains the optimality of the conventional Kalman filter.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.64-67
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• 1990

A parallel processing algorithm for discrete Kalman filter, which is one of the most commonly used filtering technique in modern control, signal processing, and communication. is proposed. Previously proposed parallel algorithms to decrease the number of computations needed in the Kalman filter are the hierachical structures by distributed processing of measurements, or the systolic structures to disperse the computational burden. In this paper, a new parallel Kalman filter employing a structure similar to recursive doubling is proposed. Estimated values of state variables by the new algorithm converge with two times faster data processing speed than that of the conventional Kalman filter. Moreover it maintains the optimality of the conventional Kalman filter.

• Journal of Korea Society of Digital Industry and Information Management
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• v.9 no.4
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• pp.59-67
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• 2013

Compared to the conventional Hardware-oriented base stations, Software Defined Radio (SDR)-based base station provides various advantages especially in flexibility and expandability. It enables the multimode capability required in 4th-generation (4G) environment which aims at a convergence network of various kinds of communication standards. However, since a single base station processes all data required in various multiple waveforms, the SDR base station faces a problem of data processing speed. In this paper, we propose a new concept of SDR base station system which adopts a parallel processing technology of clustering environment. We implemented a WiMAX system with SDR concept which adopts the Message Passing Interface (MPI) technology which enables the speed-up operations. In order to maximize the efficiency of parallel processing in signal processing, we analyze how the algorithm at each of modules is related to data to be processed. Through the implemented system, we show a drastic improvement in operation time due to parallel processing using the proposed MPI technology. In addition, we demonstrate a feasibility of SDR system for 4G or even beyond-4G as well.

• Journal of Broadcast Engineering
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• v.22 no.3
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• pp.401-404
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• 2017

The 360 VR video has a format of a stereoscopic shape such as an isometric shape or a cubic shape or a cubic shape. Although these formats have different characteristics, they have in common that the resolution is higher than that of a normal 2D video. Therefore, it takes much longer time to perform coding/decoding on 360 VR video than 2D Video, so parallel processing techniques are essential when it comes to coding 360 VR video. HEVC, the state of art 2D video codec, uses Wavefront Parallel Processing (WPP) technology as a standard for parallelization. This technique is optimized for 2D videos and does not show optimal performance when used in 3D videos. Therefore, a suitable method for WPP is required for 3D video. In this paper, we propose WPP coding/decoding method which improves WPP performance on cube map format 3D video. The experiment was applied to the HEVC reference software HM 12.0. The experimental results show that there is no significant loss of PSNR compared with the existing WPP, and the coding complexity of 15% to 20% is further reduced. The proposed method is expected to be included in the future 3D VR video codecs.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.29B no.4
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• pp.1-11
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• 1992

A parallel computer "KAPAC(KAIST Parallel Computer)" based on Transputer is designed and implemented. Its purpose is to support the real time processing and high perfomance computing through parallelizing the complex and heavy computation load. KAPAC has UNIX machine as host-computer and is implemented on VME bus as back-end machine. The parallel computer "KAPAC" is the message-passing loosely-coupled multiprocessor computer having thirty two processing elements, and the network topology between processing elements can be easily configured with the crossbar switchs using the control program. Various topologies are introduced and appoication programs are executed on the parallel computer "KAPAC" with eifferent interconnection topologies to show the reconfigurability.to show the reconfigurability.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.4
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• pp.38-49
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• 1998

A fossil power plant can be modeled by a lot of algebraic equations and differential equations. When we simulate a large, complicated fossil power plant by a computer such as workstation or PC, it takes much time until overall equations are completely calculated. Therefore, new processing systems which have high computing speed is ultimately needed for real-time or high-speed(faster than real-time) simulators. This paper presents an enhanced strategy in which high computing power can be provided by parallel processing of DSP processors with communication links. DSP system is designed for general purpose. Parallel DSP system can be easily expanded by just connecting new DSP modules to the system. General urpose DSP modules and a VME interface module was developed. New model and techniques for the task allocation are also presented which take into account the special characteristics of parallel I/O and computation. As a realistic cost function of task allocation, we suggested 'simulation period' which represents the period of simulation output intervals. Based on the development of parallel DSP system and realistic task allocation techniques, we cound achieve good efficiency of parallel processing and faster simulation speed than real-time.