• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.3
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• pp.954-972
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• 2012

Content Delivery Networks (CDN) server loads that fluctuant necessitate CDN to improve its service scalability especially when the peak load exceeds its service capacity. The peer assisted scheme is widely used in improving CDN scalability. However, CDN operators do not want to lose profit by overusing it, which may lead to the CDN resource utilization reduced. Therefore, improving CDN scalability moderately and guarantying CDN resource utilization maximized is necessary. However, when and how to use the peer-assisted scheme to achieve such improvement remains a great challenge. In this paper, we propose a new method called Dynamic Moderate Peer-assisted Method (DMPM), which uses time series analysis to predict and decide when and how many server loads needs to offload. A novel peer-assisted mechanism based on the prediction designed, which can maximize the profit of the CDN operators without influencing scalability. Extensive evaluations based on an actual CDN load traces have shown the effectiveness of DMPM.

• Journal of the Korea Society of Computer and Information
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• v.20 no.7
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• pp.9-16
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• 2015

This paper proposes the parallel design of a shot change detection algorithm using frame segmentation and moving blocks. In the proposed approach, the high parallel processing components, such as frame histogram calculation, block histogram calculation, Otsu threshold setting function, frame moving operation, and block histogram comparison, are designed in parallel for NVIDIA GPU. In order to minimize memory access delay time and guarantee fast computation, the output of a GPU kernel becomes the input data of another kernel in a pipeline way using the shared memory of GPU. In addition, the optimal sizes of CUDA processing blocks and threads are estimated through the prior experiments. In the experimental test of the proposed shot change detection algorithm, the detection rate of the GPU based parallel algorithm is the same as that of the CPU based algorithm, but the average of processing time speeds up about 6~8 times.

• The Transactions of the Korea Information Processing Society
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• v.6 no.2
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• pp.485-496
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• 1999

Comparing with sequential programming, parallel programming has additional complexity due to the consideration of parallelism, communication and synchronization of processes. A synergism between users and compliers should be established, each assisting the other to produce high quality parallel programs. On the above underlying philosophy, we developed a parallel Object-Oriented specification language, POOSL, as preliminary works. However, it is still likely to hard for users to write parallel program because users have to consider grammar of POOSL and to write text-based parallel program. It would be more desirable to provide users wit visual environment for effective parallel programming. Therefore, we propose a visual programming environment. VEPO(Visual environment for Parallel Object-Oriented Programming), based on POOSL in order that users can develop parallel programs more easily and conveniently. It aims at supporting a programming environment in which users can represent their programs more naturally and visually I parallel manner with object-oriented concept and essential steps during parallel program development such as program specification, compilation, execution and animation of execution are integrated. VEPO has useful features for parallel processing. Especially, complicated parallel codes for synchronization and communication of processes are automatically generated in the translation phase, so users can be relieved of writing error-prone parallel codes. The system is targeted to the transputer-based parallel system, MC-3. The graphic user interface of VEPO was implemented using Visual C++. Visual programs descirbed on VEPO are translated into Inmos C and executed on MC-3.

• Journal of the Korea Society of Computer and Information
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• v.16 no.5
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• pp.1-11
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• 2011

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements (PEs) and operates on a 3-stage pipelining. Experimental results indicated that the proposed parallel processor outperforms conventional parallel processors in terms of performance. In addition, our proposed parallel processor outperforms commercial high-performance TI C6416 DSP in terms of performance (1.4-31.4x better) and energy efficiency (5.9-8.1x better) with same 130nm technology and 720 clock frequency. The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.10
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• pp.1699-1708
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• 2007

The optimal power flow(OPF) problem was introduced by Carpentier in 1962 as a network constrained economic dispatch problem. Since then, the OPF problem has been intensively studied and widely used in power system operation and planning. In these days, OPF is becoming more and more important in the deregulation environment of power pool and there is an urgent need of faster solution technique for on-line application. To solve OPF problem, many heuristic optimization methods have been developed, such as Genetic Algorithm(GA), Evolutionary Programming(EP), Evolution Strategies(ES), and Particle Swarm Optimization(PSO). Especially, PSO algorithm is a newly proposed population based heuristic optimization algorithm which was inspired by the social behaviors of animals. However, population based heuristic optimization methods require higher computing time to find optimal point. This shortcoming is overcome by a straightforward parallel processing of PSO algorithm. The developed parallel PSO algorithm is implemented on a PC cluster system with 6 Intel Pentium IV 2GHz processors. The proposed approach has been tested on the IEEE 30-bus system. The results showed that computing time of parallelized PSO algorithm can be reduced by parallel processing without losing the quality of solution.

• The Transactions of the Korea Information Processing Society
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• v.2 no.2
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• pp.148-155
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• 1995

When we analize many amount of patterns, it is necessary for these patterns are to be clustering into several groups according to a certain evaluation function. This process, in case that there are lots of input patterns, needs a considerable amount of computations and is reqired parallel algorithm for these. To solve this problem, this paper propose parallel clustering algorithm which parallelized k-means algorithm and implemented it under the MIMD parallel computer based message passing. The result is through the experiment and performance analysis, that this parallel algorithm is appropriate in case these are many input patterns.

• The KIPS Transactions:PartC
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• v.10C no.7
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• pp.851-856
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• 2003

The LM generator is an improved summation generator with maximum period, near maximum linear complexity and maximum order of correlation immunity, and it has a property with the input-output correlation immunity In this paper, we propose the high-speed m-parallel LM-BSG and 8-parallel LM-BSG for detail as a design example. When compared with a conventional stream cipher, the properties of the proposed cipher exhibited the same crypto-degree (security) with a rt times faster processing.

• The Transactions of the Korea Information Processing Society
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• v.6 no.3
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• pp.792-803
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• 1999

Most data parallel language compilers are source-to-source translators. Most Compilers of HPF which is recognized as a standard data parallel language convert a parallel program in PHF in a Fortran 77 program inserted message passing primitives. By the way, they currently generate significant amount of ineffective codes in the course of the conversion. Especially, FORALL construct is converted into several DO loops, so loop overhead of these codes is very increased. In this paper, we define and use relation distance vector to keep necessary informations. Then we evaluate and analyze execution time for the codes converted by our method and by PARADIGM method for various array sizes.

• International Journal of Contents
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• v.3 no.2
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• pp.1-5
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• 2007

This paper proposes a technique for principal component analysis (PCA) to raise the recognition rate of a front face in a low dimension by hierarchical image and parallel processing structure. The conventional PCA shows a recognition rate of less than 50% in a low dimension (dimensions 1 to 6) when used for facial recognition. In this paper, a face is formed as images of 3 fixed-size levels: the 1st being a region around the nose, the 2nd level a region including the eyes, nose, and mouth, and the 3rd level image is the whole face. PCA of the 3-level images is treated by parallel processing structure, and finally their similarities are combined for high recognition rate in a low dimension. The proposed method under went experimental feasibility study with ORL face database for evaluation of the face recognition function. The experimental demonstration has been done by PCA and the proposed method according to each level. The proposed method showed high recognition of over 50% from dimensions 1 to 6.

• KIPS Transactions on Computer and Communication Systems
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• v.10 no.9
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• pp.243-250
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• 2021

Recently, with the development of cloud computing, interest in database outsourcing is increasing. However, when the database is outsourced, there is a problem in that the information of the data owner is exposed to internal and external attackers. Therefore, in this paper, we propose a parallel range query processing algorithm that supports privacy protection. The proposed algorithm uses the Paillier encryption system to support data protection, query protection, and access pattern protection. To reduce the operation cost of a checking protocol (SRO) for overlapping regions in the existing algorithm, the efficiency of the SRO protocol is improved through a garbled circuit. The proposed parallel range query processing algorithm is largely composed of two steps. It consists of a parallel kd-tree search step that searches the kd-tree in parallel and safely extracts the data of the leaf node including the query, and a parallel data search step through multiple threads for retrieving the data included in the query area. On the other hand, the proposed algorithm provides high query processing performance through parallelization of secure protocols and index search. We show that the performance of the proposed parallel range query processing algorithm increases in proportion to the number of threads and the proposed algorithm shows performance improvement by about 5 times compared with the existing algorithm.