• Journal of Korean Society of Industrial and Systems Engineering
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• v.38 no.1
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• pp.65-73
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• 2015

This paper considers a parallel-machine scheduling problem with dedicated and common processing machines using GA (Genetic Algorithm). Non-identical setup times, processing times and order lot size are assumed for each machine. The GA is proposed to minimize the total-tardiness objective measure. In this paper, heuristic algorithms including EDD (Earliest Due-Date), SPT (Shortest Processing Time) and LPT (Longest Processing Time) are compared with GA. The effectiveness and suitability of the GA are derived and tested through computational experiments.

• The Korean Journal of Applied Statistics
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• v.31 no.3
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• pp.383-396
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• 2018

Various parallel processing R packages are used for fast processing and the analysis of big data. Parallel processing is used when the work can be decomposed into tasks that are non-interdependent. In some cases, each task decomposed for parallel processing can also be decomposed into non-interdependent subtasks. We have to choose whether to parallelize the decomposed tasks in the first step or to parallelize the subtasks in the second step when facing nested parallelism situations. This choice has a significant impact on the speed of computation; consequently, it is important to understand the nature of the work and decide where to do the parallel processing. In this paper, we provide an idea of how to apply parallel computing effectively to problems by illustrating how to select a parallelism point for the bandwidth selection of nonparametric regression.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.4
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• pp.369-378
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• 1992

This paper proposes a utility parallel processing inverter system, which consists of a voltage source PWM inverter, isolation transformer and a reactor linking the inverter to utility line. This system realizes following functions : (1) voltage phase frequency and amplitude synchronization between inverter and utility line at stand-alone mode. (2) current phase synchronization between inverter and load at parallel mode. Therefore, despite sudden increase in load current over setting point at stand-alone mode, inverter system can be transferred into parallel mode immediately without transient current. Furthermore, high frequency(18KHz) PWM control and sinusoidal filtering improve the inverter output waveform by eliminating high order harmonic components as well as low order. As a switching device, IGBT is used for high frequency switching and large current capacity.

• The Transactions of the Korea Information Processing Society
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• v.4 no.11
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• pp.2903-2913
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• 1997

This paper describes the design and implementation of the ParaC language that supports parallel programming on the shared memory and distributed memory parallel machine. The ParaC language is designed for the effective use of system resources of scalable parallel systems. The goal is achieved by adding parallel and synchronization constructs for shared address spaces, and remote task constructs for distributed address spaces. This paper also shows the translation method, and we implement the translator and the run-time library for parallel execution of extended constructs.

• Journal of Communications and Networks
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• v.17 no.6
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• pp.558-567
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• 2015

In recent years, we have seen a proliferation of mobile-network-enabled smart objects, such as smart-phones and smart-watches, that form a cyber-physical integrated network to connect the cyber and physical worlds through the capabilities of sensing, communicating, and computing. Discovery of the relationship between smart objects is a critical and nontrivial task in cyber-physical integrated network applications. Aiming to find the most stable relationship in the heterogeneous and dynamic cyber-physical network, we propose a distributed and efficient relationship-discovery algorithm, called dynamically maximizing remaining unchanged time with minimum connected dominant set (DMRUT-MCDS) for constructing a backbone with the smallest scale infrastructure. In our proposed algorithm, the impact of the duration of the relationship is considered in order to balance the size and sustain time of the infrastructure. The performance of our algorithm is studied through extensive simulations and the results show that DMRUT-MCDS performs well in different distribution networks.

• Proceedings of the Korea Information Processing Society Conference
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• 2017.04a
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• pp.64-67
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• 2017

Applying concurrent structure and parallel processing are a common issue for these day's programs. In this research, Dynamic Programming is used to compare the parallel performance of Go language and Intel C++ Thread Building Blocks. The experiment was performed on 4 core machine and its result contains execution time under Simultaneous Multi-Threading environment. Static Optimal Binary Search Tree was used as an example. From the result, the speed-up of Go was higher than the number of cores, and that of TBB was close to it. TBB performed better in general, but for larger scale, Go was partially faster than the other.

• Journal of Information Processing Systems
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• v.13 no.1
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• pp.104-113
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• 2017

In this paper, we present an approach to transmit data from the source to the destination through a minimal path (least-cost path) in a computer network of n nodes. The motivation behind our approach is to address the problem of finding a minimal path between the source and destination. From the work we have studied, we found that a Steiner tree with bounded Steiner vertices offers a good solution. A novel algorithm to construct a Steiner tree with vertices and bounded Steiner vertices is proposed in this paper. The algorithm finds a path from each source to each destination at a minimum cost and minimum number of Steiner vertices. We propose both the sequential and parallel versions. We also conducted a comparative study of sequential and parallel versions based on time complexity, which proved that parallel implementation is more efficient than sequential.

• Journal of Advanced Information Technology and Convergence
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• v.9 no.2
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• pp.89-97
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• 2019

Recently, there is an increasing demand for applications utilizing maps and locations such as autonomous vehicles and location-based services. Since these applications are developed based on spatial data, interest in spatial data processing is increasing and various studies are being conducted. In this paper, I propose a parallel mining algorithm using the CUDA library to efficiently analyze large spatial data. Spatial data includes both geometric (spatial) and non-spatial (aspatial) attributes. The proposed parallel spatial data mining algorithm analyzes both the geometric and non-spatial relationships between two layers. The experiment was performed on graphics cards containing CUDA cores based on TIGER/Line data, which is the actual spatial data for the US census. Experimental results show that the proposed parallel algorithm using CUDA greatly improves spatial data mining performance.

• Proceedings of the Korea Information Processing Society Conference
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• 2004.05a
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• pp.1655-1658
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• 2004

Current rendering processors are organized mainly to process a triangle as fast as possible and recently parallel 3D rendering processors, which can process multiple triangles in parallel with multiple rasterizers, begin to appear. For high performance in processing triangles, it is desirable for each rasterizer have its own local pixel cache. However, the consistency problem may occur in accessing the data at the same address simultaneously by more than one rasterizer. In this paper, we propose a parallel rendering processor architecture, called DAVID II, resolving such consistency problem effectively. Moreover, the proposed architecture reduces the latency due to a pixel cache miss significantly. The experimental results show that DAVID II achieves almost linear speedup at best case even in sixteen rasterizers.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.1
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• pp.1-6
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• 2009

A Thinning algorithm is a very Important factor in order to recognize the character, figure, and drawing. Until comparatively lately, the thinning algorithm was proposed by various methods. In this paper, we ascertain the point at issue of ZS(Zhang and Suen), LW(Lu and Wang) and WHF(Wang, Hui and Fleming) algorithms that are the parallel thinning algorithms. The parallel thinning algorithm means the first processing doesn't have to influence to the second processing. ZS algorithm has a problem which loses pixels in slanting lines and LW algorithm doesn't have one pixel width in slanting lines. So I propose an advanced parallel thinning algorithm that connects the pixels each other and preserve the end point.