• 제목/요약/키워드: and low power simulation

검색결과 2,122건 처리시간 0.027초

A Noncoherent UWB Communication System for Low Power Applications

  • Yang, Suck-Chel;Park, Jung-Wan;Moon, Yong;Lee, Won-Cheol;Shin, Yo-An
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.210-216
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    • 2004
  • In this paper, we propose a noncoherent On-Off Keying (OOK) Ultra Wide Band (UWB) system based on power detection with noise power calibration for low power applications. The proposed UWB system achieves good bit error rate performance which is favorably comparable to that of the system using the ideal adaptive threshold, while maintaining simple receiver structure, In addition, low power Analog Front-End (AFE) blocks for the proposed noncoherent UWB transceiver are proposed and verified using CMOS technology. Simulation results on the pulse generator, delay time generator and 1-bit Analog-to-Digital (AID) converter show feasibility of the proposed UWB AFE system.

UPFC의 동적 시뮬레이션 알고리즘 개발 (Development of Dynamic Simulation Algorithm of UPFC)

  • 손광명;김동현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 추계학술대회 논문집 학회본부 A
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    • pp.226-228
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    • 1999
  • This paper presents a dynamic simulation algorithm for studying the effect of Unified Power Flow Controller(UPFC) on the low frequency power system oscillations and transient stability studies. The algorithm is a Newton-type one and gives a fast convergence characteristics. The algorithm is applied to inter-area power oscillation damping regulator design of a sample two-area power system. The results show that UPFC is very effective for damping inter-area oscillations.

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마이크로파 실내 배전용 저반사형 전력 분배 스위치 (Low Loss Power Dividing Switch for Indoor Microwave Power Distribution)

  • 최영규
    • 전기학회논문지
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    • 제62권1호
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    • pp.90-94
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    • 2013
  • A low loss power dividing switch in a indoor microwave power distribution system is proposed and designed with a various power dividing ratio. Switching characteristics are analyzed by use of the S-parameter of the switch. Newly proposed switch showed a very low return loss less than -30dB at the operating frequency of 2.45GHz. Three kinds of the switch in which we take out individually 1/2, 1/3 and 1/4 of the input power were fabricated, and measured the delivered, transmitted, and return loss power ratio. Simulated results showed that the lower power ratio is, the better accurate operating performance shows. This switch can switch the input power from 4.5% to 58% with the variance of 5% output power. The experimental results are in good agreement with the simulation within the return loss of 1%.

저전력 모바일 멀티미디어 시스템 구조 설계에 관한 연구 (A design of a low power mobile multimedia system architecture)

  • 이은서;이재식;김병일;장태규
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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    • pp.231-233
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    • 2005
  • For the low-power design of the mobile multimedia system architecture, this paper modeling the mobile multimedia system and analysis the power consumption profile about the whole communication environment. The mobile system model consist of air interface, RIP front-end, base-band processing module and human interface. For the result of power consumption profile analysis, the power consumption of multimedia processing is above 60% compare to the whole power consumption in mobile multimedia system. To minimize the power consumption in processing module which consumes the large power, this paper proposed the Microscopic DVS technique which applies the optimum voltage for the each multimedia frame. For the simulation result, proposed power minimization technique reduce the power consumption about 30%.

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저 전압 스윙 기술을 이용한 저 전력 병렬 곱셈기 설계 (Design of a Low-Power Parallel Multiplier Using Low-Swing Technique)

  • 김정범
    • 정보처리학회논문지A
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    • 제14A권3호
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    • pp.147-150
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    • 2007
  • 본 논문에서는 작은 점유면적과 저 전력 소모 특성을 갖도록 CPL(Complementary Pass-Transistor Logic) 논리구조의 전가산기에 저 전압 스윙 기술을 적용하여 16$\times$16 비트 병렬 곱셈기를 설계하였다. 회로구성상 CPL 논리구조는 CMOS 논리구조에 비해 NMOS 트랜지스터만을 사용하기 때문에 작은 면적을 소비한다. 저 전압 스윙 기술은 회로에 공급되는 전압보다 낮은 전압 레벨에서 출력 동작을 하여 전력 소모를 감소시키는 기술이다. 본 논문에서는 전가산기의 출력 단에 사용되는 인버터에 저 전압 스윙 기술을 적용하여 저 전력 소모 특성을 갖는 16$\times$16 비트 병렬 곱셈기를 설계하였다 설계한 회로는 17.3%의 전력 소모 감소와 16.5%의 전력소모와 지연시간의 곱(Power Delay) 감소가 이루어졌다.

80 V급 저전력 반도체 소자의 관한 연구 (Design of 80 V Grade Low-power Semiconductor Device)

  • 심관필;안병섭;강예환;홍영성;강이구
    • 한국전기전자재료학회논문지
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    • 제26권3호
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    • pp.190-193
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    • 2013
  • Power MOSFET and Power IGBT is develop in power savings, high efficiency, small size, high reliability, fast switching, low noise. Power MOSFET can be used high-speed switching transistors devices. Power MOSFET is devices the voltage-driven approach switching devices are design to handle on large power, power supplies, converters. In this paper, design the 80V MOSFET Planar Gate type, and design the Trench Gate type for realization of low on-resistance. For both structures, by comparing and analyzing the results of the simulation and characterization.

저 출력시 증기발생기 수위의 자동제어논리 개발 (Development of an automatic steam generator level control logic at low power)

  • 한재복;정시채;유준
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
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    • pp.601-604
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    • 1996
  • It is well known that steam generator water level control at low power operation has many difficulties in a PWR (pressurized water reactor) nuclear power plant. The reverse process responses known as shrink and swell effects make it difficult to control the steam generator water level at low power. A new automatic control logic to remove the reverse process responses is proposed in this paper. It is implemented in PLC (programmable logic controller) and evaluated by using test equipment in Korea Atomic Energy Research Institute. The simulation test shows that the performance requirements is met at low power (below 15%). The water level control by new control logic is stabilized within 1% fluctuation from setpoint, while the water level by YGN 3 and 4 control logic is unstable with the periodic fluctuation of 25% magnitude at 5% power.

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MSP430 기반 저전력 뇌 신경자극기 S/W 설계 및 구현 (Design and Implementation of Low-power Neuromodulation S/W based on MSP430)

  • 홍상표;권성호;심현민;이상민
    • 전자공학회논문지
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    • 제53권7호
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    • pp.110-120
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    • 2016
  • 인체 삽입형 뇌 신경자극기는 소비전력에 있어서 효율적인 구조로 설계되어야 한다. 이들 자극신호는 파형이 단순하고, MCU(micro controller unit)의 대기시간은 실행시간보다 훨씬 긴 특성을 가짐에도 불구하고, 이러한 특성을 고려한 저전력 설계가 되어 있지 않다. 본 논문에서는 자극신호 특성에 기반하는 저전력 알고리즘을 제안한다. 또한 뇌 신경자극기 S/W, NMS(neuro modulation simulation)의 설계 및 구현 결과도 제시한다. 저전력 알고리즘 구현을 위해, 기존 뇌 신경자극기 프로그램의 함수별 수행(running) 시간을 분석하여, 실행(execution) 시간과 대기(waiting) 시간을 도출하였다. 그리고 AM-LPM(active mode-low power mode) 전환시간을 추정하여 저전력 알고리즘 구현에 반영하였다. 본 논문에서 제안하는 저전력 알고리즘은 자극신호의 특성을 이용하여 출력을 다수의 구간으로 분할하고, MCU를 구간별 AM 또는 LPM으로 운용한다. 제안하는 알고리즘의 검증을 위해, 외부 제어프로그램을 개발하여 알고리즘의 동작상태를 확인하였고, 오실로스코프를 이용하여 출력신호의 정확성을 확인하였다. 검증 결과, 제안하는 저전력 알고리즘을 적용할 경우, 기존 뇌 신경자극기 대비 소모전류를 76.31% 감소시킴을 확인 할 수 있었다.

Research of the Mechanism of Low Frequency Oscillation Based on Dynamic Damping Effect

  • Liu, Wenying;Ge, Rundong;Zhu, Dandan;Wang, Weizhou;Zheng, Wei;Liu, Fuchao
    • Journal of Electrical Engineering and Technology
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    • 제10권4호
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    • pp.1518-1526
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    • 2015
  • For now, there are some low frequency oscillations in the power system which feature low frequency oscillation with positive damping and cannot be explained by traditional low frequency oscillation mechanisms. Concerning this issue, the dynamic damping effect is put forward on the basis of the power-angle curve and the study of damping torque in this article. That is, in the process of oscillation, damping will dynamically change and will be less than that of the stable operating point especially when the angle of the stable operating point and the oscillation amplitude are large. In a situation with weak damping, the damping may turn negative when the oscillation amplitude increases to a certain extent, which may result in an amplitude-increasing oscillation. Finally, the simulation of the two-machine two-area system verifies the arguments in this paper which may provide new ideas for the analysis and control of some unclear low frequency phenomena.

3상 PWM Converter를 위한 정지 좌표계법 Analog 제어기 설계 및 시뮬레이션 (Design and Simulation of analog controller for 3 Phase PWM Converter Based on Stationary Reference Frame)

  • 이영국;노철원;최종률
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1997년도 전력전자학술대회 논문집
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    • pp.14-20
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    • 1997
  • Due to several advantages of Pulse Width Modulated(PWM) Converter, such as unity power factor with low-harmonics and energy regeneration, PWM converter has been widely used in industrial application. In every application of energy conversion equipment, the design and implementation must be carried out considering performance and cost. High quality with low cost is the best choice for energy conversion equipment. High dc link voltage can reduce inverter and motor side losses and system dimension compare to low dc link voltage. Analog controller can make PWM converter cheaper without considerable degradation of the performance than digital controller. This paper shows the simplified analog controller-for 600V dc link voltage using stationary reference frame control and the simulation results.

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