• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.3
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• pp.211-216
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• 2013

A wind generator system model includes wind model, rotor dynamics, synchronous generator, power converter, distribution line and infinite bus. This paper investigates the low-Voltage Ride-Through capability of PMSG wind turbine in a variable speed. The drive train of a wind turbine on 2-mass modeling can observe the shaft torsional vibration when the low-voltage occur. To reduce the torsional vibration when the low-voltage occur, this paper designs suppression control algorithm of the torsional vibration and implements simulation. The simulation based on MATLAB/SIMULINK has validated at the transient state of the PMSG and an experiment using 3kW simulator has validated the LVRT control.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.569-572
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• 2009

In this study, HFC ORCs (Organic Rankine Cycles) are investigated for a low-temperature geothermal power generation by a simulation method. A steady-state simulation model is developed to analyze and optimize cycle's performance. The model contains a turbine, a pump, an expansion valve and heat exchangers. The turbine and pump are modelled by an isentropic efficiency. Simulations were carried out for the given heat source and sink inlet temperatures, and given flow rate that is based on the typical power plant thermal-capacitance-rate ratio. 3 HFC fluids are considered as a candidate for a working fluid of low-temperature ORCs. In this study, all optimized HFC ORCs are shown to yield almost the same performance in terms of power for a low-temperature heat source of about $100^{\circ}C$.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.49 no.10
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• pp.502-508
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• 2000

This paper presents a dynamic simulation algorithm for studying the effect of United Power Flow Controller(UPFC) on the low frequency power system oscillations and transient stability studies. The proposed algorithm is a Newton-type one and uses current injection type UPFC model, which gives a fast convergence characteristics. The algorithm is applied to studying inter-area power oscillation damping enhancement of a sample two-area power system both in time domain and frequency domain. The case study results show that the proposed algorithm is very efficient and UPFC is very effective and robust against operating point change.

• Journal of the Korea Society for Simulation
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• v.14 no.3
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• pp.101-108
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• 2005

IEEE 802.15.4 low-rate Wireless Personal Area Networks (WPAN) are expected to provide ubiquitous networking between small personal/home devices and sensors with low power consumption and low cost features. The technology employs special CSMA/CA (Carrier Sense Multiple Access/collision Avoidance) to save power consumption for small or portable WPAN-enabled devices. In this paper, we simulation the slotted CSMA/CA of IEEE 802.15.4 MAC and evaluate its performance limit in order to grasp the characteristics of Medium Access Control (MAC) of IEEE 802.15.4 WPAN.

• Journal of Sensor Science and Technology
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• v.27 no.6
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• pp.362-367
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• 2018

A complementary metal oxide semiconductor (CMOS) binary image sensor is proposed for low-power and low-noise operation. The proposed binary image sensor has the advantages of reduced power consumption and fixed pattern noise (FPN). A gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector is used as the proposed CMOS binary image sensor. The GBT PMOSFET-type photodetector has a floating gate that amplifies the photocurrent generated by incident light. Therefore, the sensitivity of the GBT PMOSFET-type photodetector is higher than that of other photodetectors. The proposed CMOS binary image sensor consists of a pixel array with $394(H){\times}250(V)$ pixels, scanners, bias circuits, and column parallel readout circuits for binary image processing. The proposed CMOS binary image sensor was analyzed by simulation. Using the dynamic comparator, a power consumption reduction of approximately 99.7% was achieved, and this performance was verified by the simulation by comparing the results with those of a two-stage comparator. Also, it was confirmed using simulation that the FPN of the proposed CMOS binary image sensor was successfully reduced by use of the double sampling process.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2008.03a
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• pp.570-573
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• 2008

In spite of many experimental studies of low-power applied-field magnetoplasmadynamic(AFMPD) thrusters, thrust efficiencies of the past thrusters are very low. Hence, drastic improvement in thrust performance is required for AF-MPD thrusters to compete against other types of electric propulsion in a moderate power regime around 10 kW. For the optimization of AF-MPD thrusters, a numerical code for the flowfield simulation is now under development. A preliminary result shows that the code can deal with a complicated mixture of the induced and applied magnetic fields, which will lead to a combination of the self-field, swirl, Hall, as well as electrothermal accelerations.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.05a
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• pp.10-14
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• 2005

IEEE 802.15.4 low-rate Wireless Personal Area Networks(WPAN) are expected to provide ubiquitous networking between small personal/home devices and sensors with low power consumption and low cost features. The technology employs special CSMA/CA (Carrier Sense Multiple Access/collision Avoidance) to save power consumption for small or portable WPAN-enabled devices. In this paper, we simulation the slotted CSMA/CA of IEEE 802.15.4 MAC and evaluate its performance limit in order to grasp the characteristics of Medium Access Control (MAC) of IEEE 802.15.4 WPAN.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1559-1561
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• 2003

In northeast Asia, there will be several important HVDC transmission lines to be established in Korea and China for perspective electric network market. 5500V 4-inches High voltage thyristor can be used in the DC transmission and distribution of electric power system. In this application, many thyristors are connected in series for each thyristor valves. Therefore, the required low reverse-recovery charge QRR and low on-state voltage drop $V_{TM}$ for such thyristor is necessary to this application. In our work, the on-state and off-state voltage performance was simulated by commercial simulation software.

• ETRI Journal
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• v.44 no.3
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• pp.491-503
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• 2022

Metal-oxide-semiconductor field-effect transistors (MOSFETs) are continuously scaling down in the nanoscale region to improve the functionality of integrated circuits. The scaling down of MOSFET devices causes short-channel effects in the nanoscale region. In nanoscale region, leakage current components are increasing, resulting in substantial power dissipation. Very large-scale integration designers are constantly exploring different effective methods of mitigating the power dissipation. In this study, a transistor-level input-controlled stacking (ICS) approach is proposed for minimizing significant power dissipation. A low-power ICS approach is extensively discussed to verify its importance in low-power applications. Circuit reliability is monitored for process and voltage and temperature variations. The ICS approach is designed and simulated using Cadence's tools and compared with existing low-power and high-speed techniques at a 22-nm technology node. The ICS approach decreases power dissipation by 84.95% at a cost of 5.89 times increase in propagation delay, and improves energy dissipation reliability by 82.54% compared with conventional circuit for a ring oscillator comprising 5-inverters.

• Journal of Power Electronics
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• v.8 no.1
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• pp.51-59
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• 2008

This paper addresses several issues concerning the analysis, design, modeling, simulation and development of single-phase, single-switch, power factor corrected AC-DC high frequency switching converter topologies with transformer isolation. A detailed analysis and design is presented for single-switch topologies, namely forward buck, flyback, Cuk, Sepic and Zeta buck-boost converters, with high frequency isolation for discontinuous conduction modes (DCM) of operation. With an awareness of modem design trends towards improved performance, these switching converters are designed for low power rating and low output voltage, typically 20.25W with 13.5V in DCM operation. Laboratory prototypes of the proposed single-switch converters in DCM operation are developed and test results are presented to validate the proposed design and developed model of the system.