• Title/Summary/Keyword: and discrete feedback

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Low-Complexity Detection Techniques for Run-Length Limited Codes with d=2 (RLL(2,10) 변조 부호를 고려한 저복잡도 검출 기법)

  • 조한규;이보형;손희기;강창언;홍대식
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.141-144
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    • 2000
  • PRML (partial response maximum-likelihood) 과 FDTS/DF (fixed-delay tree search with decision feedback)는 기록 저장 시스템에서 준최적의 성능을 보임이 잘 알려져 있다. 그러나, 위와 같은 정보열 검출 기법은 피할 수 없는 복잡도 문제를 가지고 있다. 본 논문은 최소 run 길이 제한조건 d=2를 가진 광기록 채널을 위한 다양한 저복잡도 검출 기법을 다룬다. 우선, 결정 궤환 기법을 이용한 이산 정합 여파기 (discrete matched filter with decision feedback:DMF/DF)가 기존의 PRML로부터 유도된다. 유도된 시스템은 PRML보다 결정 궤환에 의한 성능 이득을 갖는다. 또한, 메트릭 계산을 사용하지 않는 저복잡도 FDTS/DF가 유도된다. 모의실험 결과에 의하면, 유도된 저복잡도 검출 기법들은 기록 밀도 S>=5.5에서 P(D)=1+D+D/sup 2/+D/sup 3/의 target을 갖는 PRML보다 우수한 성능을 보인다.

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State Feedback Stabilization of Network Based Control Systems with Time-varying Delay (시변시간지연을 가지는 네트워크 기반 시스템의 상태궤환 안정화)

  • Jung Eui-Heon;Shu Young-Su;Lee Hong-Hee
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.53 no.11
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    • pp.741-746
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    • 2004
  • When investigating a control problem for network based control systems, the main issue is network-induced delay. This delay can degrade the performance of control systems designed without considering the delay and even destabilize the system. In this paper, we consider the stabilization of network based control systems, where there is bounded time-varying delay. This delay is treated like parameter variation of a discrete time system. The state feedback controller design is formulated as linear matrix inequality. Finally, we show that the stability of control systems designed with considering the delay is superior to that is not so.

A widely tunable sampled-grating distributed feedback laser diode integrated with sampled-grating distributed bragg reflector (추출격자 분포 브래그 반사기가 집적된 광대역 파장가변 추출격자 분포 궤환 레이저 다이오드)

  • 김수현;정영철
    • Korean Journal of Optics and Photonics
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    • v.15 no.4
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    • pp.369-374
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    • 2004
  • In this paper, we propose a new tunable laser diode structure. The laser diode consists of a sampled-grating distributed feedback laser diode monolithically integrated with a sampled-grating distributed-Brags-Reflector. For a specific design, the possibility of continuous/discrete wavelength tuning over 27nm is confirmed by a numerical analysis using a split-step time domain model. Because the laser diode can be directly coupled with optical fiber without the intervention of the passive section, the laser diode exhibits higher output power than the conventional laser diode.

Optimal Control of Nuclear Reactors by Digital Computer (전자계산기에 의한 원자로최적제어)

  • 천희영;박귀태
    • 전기의세계
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    • v.26 no.6
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    • pp.66-71
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    • 1977
  • In this paper a method is presented for the optimal control of a nuclear reactor at equilibrium state by use of a digital computer. Using the optimal control theory, we formulate the control problem of the reactor as a discrete-time linear regulator problem. A quadratic performance index is defined. The effects of choosing different performance index weighting matrices to the feedback gain matrix and reactor transient responses are studied for the deterministic optimal control with all state variables accessible to measurement.

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Constraned $H_{\infty}$ Optimal Control

  • Park, Jinhoon;Ko, Hoon-Seok;Lee, Kwang-Soon
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.536-536
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    • 2000
  • In this paper, we show based on Lyapunov theorem that the closed loop system with the constrained H$_{\infty}$ optimal controller is exponentially stable. Then the on-line feedback implementation of the constrained H$_{\infty}$ optimal control based on quadratic programs is proposed.

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Modeling and Analysis of Buck LED Driver with Slope Compensation (Slope 보상을 가진 벅 LED 구동기의 모델링 및 해석)

  • Kim, Marn-Go;Jung, Young-Seok;Kim, Nam-Ho
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.98-99
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    • 2017
  • A discrete time domain modeling for the current-mode-controlled buck LED driver is presented in this paper. Based on the modeling result, a root locus analysis for the buck LED driver with slope compensation is done to derive the stability boundaries of feedback gains.

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A Study on DCT Hierarchical LMS DFE Algorithm to Improve the Performance of ATSC Digital TV Broadcasting (ATSC 디지털 TV 방송수신 성능개선을 위한 DCT 계층적 LMS DFE 알고리즘 연구)

  • 김재욱;서종수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.7A
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    • pp.529-536
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    • 2003
  • In this Paper, a new DCT HLMS DFE(Discrete Cosine Transform Hierarchical Least Mean Square Decision Feedback Equalizer) algorithm is proposed to improve the convergence speed and MSE(Mean Square Error) performance of a receive channel equalizer in ATSC(Advanced Television System Committee) 8VSB(Vestigial Side Band) digital terrestrial TV system. The proposed algorithm reduces the eigenvalue range of input data autocorrelation by transforming LMS (Least Mean Square) DFE into the subfilter of hierarchical structure. Moreover, the use of DCT and power estimation algorithm makes it possible to reduce the eigenvalue deviation of input data which results from distortion and delay of the receive signal in the miulti-path environment. Simulation results show that proposed DCT HLMS DFE has SNR improvement of approximately 3.8dB, 5dB and 2dB as compared to LMS DFE when the equalized symbol error rate is 0.2 in ATTC defined digital terrestrial TV broadcasting channels A, B and F, respectively.

A PLL with high-speed operating discrete loop filter (고속에서 동작하는 이산 루프필터를 가진 PLL)

  • An, Seong-Jin;Choi, Young-Shig
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.12
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    • pp.2326-2332
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    • 2016
  • In this paper, the proposed small size PLL works stable with the discrete loop filter which is controlled by voltage controlled oscillator's output signal. A switch controlled loop filter is introduced into the proposed PLL instead of a conventional $2^{nd}$-order loop filter. Those three switches are controlled by the very high frequency output signal of voltage controlled oscillator. The switches are also controlled by UP/DN signals and 'on/off' depending the presence of UP/DN signals. A negative feedback functioned capacitor with a switch does make it possible to integrate the PLL into a single chip. The proposed PLL works stably even though a total of small 180pF capacitor used in the discrete loop filter. The proposed PLL has been designed with a 1.8V supply voltage, 0.18um multi - metal and multi - poly layer CMOS process and proved by Hspice simulation.

Direct Stator Flux Vector Control Strategy for IPMSM using a Full-order State Observer

  • Yuan, Qingwei;Zeng, Zhiyong;Zhao, Rongxiang
    • Journal of Electrical Engineering and Technology
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    • v.12 no.1
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    • pp.236-248
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    • 2017
  • A direct stator flux vector control scheme in discrete-time domain is proposed in this paper for the interior permanent magnet synchronous motor (IPMSM) drive to remove the proportional-integral (PI) controller from the direct torque control (DTC) scheme applied to IPMSM and to obtain faster dynamic response and lower torque ripple output. The output of speed outer loop is used as the desired torque angle instead of the desired torque in the proposed scheme. The desired stator flux vector in dq coordinate is calculated with a given amplitude. The state-space equations in discrete-time for IPMSM are established, the actual stator flux vector is estimated in deadbeat manner by a full-order state observer, and then the closed-loop control is achieved by the pole placement. The stator flux error vector is utilized to calculate the reference stator voltage vector. Extracting the angle position and amplitude from the estimated stator flux vector and estimating the output torque are eliminated for the direct feedback control of the stator flux vector. The proposed scheme is comparatively investigated with a PI-SVM DTC scheme by experiment results. Experimental results show the feasibility and advantages of the proposed control scheme.