• Title/Summary/Keyword: and Parallel Processing

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Implementation of All-Optical Serial-Parallel Data Converters Using Mach-Zehnder Interferometers and Applications (MZI를 이용한 전광 직렬-병렬 데이터 형식 변환기 구현과 활용 방안)

  • Lee, Sung Chul
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.7 no.2
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    • pp.59-65
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    • 2011
  • All-optical signal processing is expected to offer advantages in speed and power consumption against over electronics signal processing. It has a potential to solve the bottleneck issues of ultra-high speed communication network nodes. All-optical serial-to-parallel and parallel-to-serial data converters would make it possible to easily process the serial data information of a high-speed optical packet without optical-to-electronic-to-optical data conversion. In this paper, we explain the principle of simple and easily expandable all-optical serial-to-parallel and parallel-to-serial data converters based on Mach-Zehnder interferometers. We experimentally demonstrate these data converters at 10Gbit/s serial data rate. They are useful all-optical devices for the all-optical implementations of label decoding, self-routing, control of variable packets, bit-wise logical operation, and data format conversion.

An Implementation of Pipelined Prallel Processing System for Multi-Access Memory System

  • Lee, Hyung;Cho, Hyeon-Koo;You, Dae-Sang;Park, Jong-Won
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.149-151
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    • 2002
  • We had been developing the variety of parallel processing systems in order to improve the processing speed of visual media applications. These systems were using multi-access memory system(MAMS) as a parallel memory system, which provides the capability of the simultaneous accesses of image points in a line-segment with an arbitrary degree, which is required in many low-level image processing operations such as edge or line detection in a particular direction, and so on. But, the performance of these systems did not give a faithful speed because of asynchronous feature between MAMS and processing elements. To improve the processing speed of these systems, we have been investigated a pipelined parallel processing system using MAMS. Although the system is considered as being the single instruction multiple data(SIMD) type like the early developed systems, the performance of the system yielded about 2.5 times faster speed.

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Implementation of Pixel Subword Parallel Processing Instructions for Embedded Parallel Processors (임베디드 병렬 프로세서를 위한 픽셀 서브워드 병렬처리 명령어 구현)

  • Jung, Yong-Bum;Kim, Jong-Myon
    • The KIPS Transactions:PartA
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    • v.18A no.3
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    • pp.99-108
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    • 2011
  • Processor technology is currently continued to parallel processing techniques, not by only increasing clock frequency of a single processor due to the high technology cost and power consumption. In this paper, a SIMD (Single Instruction Multiple Data) based parallel processor is introduced that efficiently processes massive data inherent in multimedia. In addition, this paper proposes pixel subword parallel processing instructions for the SIMD parallel processor architecture that efficiently operate on the image and video pixels. The proposed pixel subword parallel processing instructions store and process four 8-bit pixels on the partitioned four 12-bit registers in a 48-bit datapath architecture. This solves the overflow problem inherent in existing multimedia extensions and reduces the use of many packing/unpacking instructions. Experimental results using the same SIMD-based parallel processor architecture indicate that the proposed pixel subword parallel processing instructions achieve a speedup of $2.3{\times}$ over the baseline SIMD array performance. This is in contrast to MMX-type instructions (a representative Intel multimedia extension), which achieve a speedup of only $1.4{\times}$ over the same baseline SIMD array performance. In addition, the proposed instructions achieve $2.5{\times}$ better energy efficiency than the baseline program, while MMX-type instructions achieve only $1.8{\times}$ better energy efficiency than the baseline program.

A Spatiotemporal Parallel Processing Model for the MLP Neural Network (MLP 신경망을 위한 시공간 병렬처리모델)

  • Kim Sung-Oan
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.5 s.37
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    • pp.95-102
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    • 2005
  • A Parallel Processing model by considering a spatiotemporal parallelism is presented for the training procedure of the MLP neural network. We tried to design the flexible Parallel Processing model by simultaneously applying both of the training-set decomposition for a temporal parallelism and the network decomposition for a spatial parallelism. The analytical Performance evaluation model shows that when the problem size is extremely large, the speedup of each implementation depends, in the extreme, on whether the problem size is pattern-size intensive or pattern-quantify intensive.

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AccessGrid Framework (액세스그리드 프레임워크)

  • Baek Jong-Kwun;Lee Tae-Dong;Jeong Chang-Sung
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.06c
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    • pp.214-216
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    • 2006
  • 액세스그리드 프레임워크(AccessGrid Framework)는 지리적인 제한에 관계없이 가상적인 협업 환경을 제공하는 도구이다. 액세스그리드 프레임워크는 기존의 시스템이 갖추지 못한 사용자의 이동성 지원을 추가하고, 유비쿼터스 환경에 적절한 자동화 기능을 제공함으로써 액세스그리드 환경을 확장한다. 이들은 웹 서비스 기반의 기존 구현물인 액세스그리드 툴킷(AccessGrid Toolkit)을 적극적으로 활용하여 개발되었으며, 향후에 불안정한 종속성을 제거하여 개수될 예정이다.

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Four Consistency Levels in Trigger Processing (트리거 처리 4 단계 일관성 레벨)

  • ;Eric Hanson
    • Journal of KIISE:Databases
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    • v.29 no.6
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    • pp.492-501
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    • 2002
  • An asynchronous trigger processor (ATP) is a oftware system that processes triggers after update transactions to databases are complete. In an ATP, discrimination networks are used to check the trigger conditions efficiently. Discrimination networks store their internal states in memory nodes. TriggerMan is an ATP and uses Gator network as the .discrimination network. The changes in databases are delivered to TriggerMan in the form of tokens. Processing tokens against a Gator network updates the memory nodes of the network and checks the condition of a trigger for which the network is built. Parallel token processing is one of the methods that can improve the system performance. However, uncontrolled parallel processing breaks trigger processing semantic consistency. In this paper, we propose four trigger processing consistency levels that allow parallel token processing with minimal anomalies. For each consistency level, a parallel token processing technique is developed. The techniques are proven to be valid and are also applicable to materialized view maintenance.

VDI Performance Optimization with Hybrid Parallel Processing in Thick Client System under Heterogeneous Multi-Core Environment (Heterogeneous 멀티 코어 환경의 Thick Client에서 VDI 성능 최적화를 위한 혼합 병렬 처리 기법 연구)

  • Kim, Myeong-Seob;Huh, Eui-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.3
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    • pp.163-171
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    • 2013
  • Recently, the requirement of processing High Definition (HD) video or 3D application on low, mobile devices has been expanded and content data has been increased as well. It is becoming a major issue in Cloud computing where a Virtual Desktop Infrastructure (VDI) Service needs efficient data processing ability to provide Quality of Experience (QoE) in Cloud computing. In this paper, we propose three kind of Thick-Thin VDI Service which can share and delegate VDI service based on Thick Client using CPU and GPU. Furthermore, we propose and discuss the VDI Service Optimization Method in mixed CPU and GPU Heterogeneous Environment using CPU Parallel Processing OpenMP and GPU Parallel Processing CUDA.

Current-Mode Serial-to-Parallel and Parallel-to-Serial Converter for Current-Mode OFDM FFT LSI (전류모드 OFDM FFT LSI를 위한 전류모드 직병렬/병직렬 변환기)

  • Park, Yong-Woon;Min, Jun-Gi;Hwang, Sung-Ho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.9 no.1
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    • pp.39-45
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    • 2009
  • OFDM is used for achieving a high-speed data transmission in mobile wireless communication systems. Conventionally, fast Fourier transform that is the main signal processing of OFDM is implemented using digital signal processing. The DSP FFT LSI requires large power consumption. Current-mode FFT LSI with analog signal processing is one of the best solutions for high speed and low power consumption. However, for the operation of current-mode FFT LSI that has the structure of parallel-input and parallel-output, current-mode serial-to-parallel and parallel-to-serial converter are indispensable. We propose a novel current-mode SPC and PSC and full chip simulation results agree with experimental data. The proposed current-mode SPC and PSC promise the wide application of the current-mode analog signal processing in the field of low power wireless communication LSI.

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Parallel Design and Implementation of Shot Boundary Detection Algorithm (샷 경계 탐지 알고리즘의 병렬 설계와 구현)

  • Lee, Joon-Goo;Kim, SeungHyun;You, Byoung-Moon;Hwang, DooSung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.2
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    • pp.76-84
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    • 2014
  • As the number of high-density videos increase, parallel processing approaches are necessary to process a large-scale of video data. When a processing method of video data requires thousands of simple operations, GPU-based parallel processing is preferred to CPU-based parallel processing by way of reducing the time and space complexities of a given computation problem. This paper studies the parallel design and implementation of a shot-boundary detection algorithm. The proposed shot-boundary detection algorithm uses pixel brightness comparisons and global histogram data among the blocks of frames, and the computation of these data is characterized with the high parallelism for the related operations. In order to maximize these operations in parallel, the computations of the pixel brightness and histogram are designed in parallel and implemented in NVIDIA GPU. The GPU-based shot detection method is tested with 10 videos from the set of videos in National Archive of Korea. In experiments, the detection rate is similar but the computation time is about 10 time faster to that of the CPU-based algorithm.