• Title/Summary/Keyword: and Parallel Processing

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A Study on Clustering and Identifying Gene Sequences using Suffix Tree Clustering Method and BLAST (서픽스트리 클러스터링 방법과 블라스트를 통합한 유전자 서열의 클러스터링과 기능검색에 관한 연구)

  • Han, Sang-Il;Lee, Sung-Gun;Kim, Kyung-Hoon;Lee, Ju-Yeong;Kim, Young-Han;Hwang, Kyu-Suk
    • Journal of Institute of Control, Robotics and Systems
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    • v.11 no.10
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    • pp.851-856
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    • 2005
  • The DNA and protein data of diverse species have been daily discovered and deposited in the public archives according to each established format. Database systems in the public archives provide not only an easy-to-use, flexible interface to the public, but also in silico analysis tools of unidentified sequence data. Of such in silico analysis tools, multiple sequence alignment [1] methods relying on pairwise alignment and Smith-Waterman algorithm [2] enable us to identify unknown DNA, protein sequences or phylogenetic relation among several species. However, in the existing multiple alignment method as the number of sequences increases, the runtime increases exponentially. In order to remedy this problem, we adopted a parallel processing suffix tree algorithm that is able to search for common subsequences at one time without pairwise alignment. Also, the cross-matching subsequences triggering inexact-matching among the searched common subsequences might be produced. So, the cross-matching masking process was suggested in this paper. To identify the function of the clusters generated by suffix tree clustering, BLAST was combined with a clustering tool. Our clustering and annotating tool is summarized as the following steps: (1) construction of suffix tree; (2) masking of cross-matching pairs; (3) clustering of gene sequences and (4) annotating gene clusters by BLAST search. The system was successfully evaluated with 22 gene sequences in the pyrubate pathway of bacteria, clustering 7 clusters and finding out representative common subsequences of each cluster

Design & Implementation of Flight Software Satellite Simulator based on Parallel Processing (병렬처리 기반의 위성 탑재소프트웨어 시뮬레이터 설계 및 개발)

  • Choi, Jong-Wook;Nam, Byeong-Gyu
    • Journal of Satellite, Information and Communications
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    • v.7 no.2
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    • pp.80-86
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    • 2012
  • The software-based satellite simulator has been developed from the start of the project to resolve the restriction and limitation of using hardware-based software development platform. It enables the development of flight software to be performed continuously since initial phase. The satellite simulator emulates the on-board computer, I/O modules, electronics and payloads, and it can be easily adapted and changed on hardware configuration change. It supports the debugging and test facilities for software engineers to develop flight software. Also the flight software can be loaded without any modification and can be executed as faster than real-time. This paper presents the architecture and design of software-based GEO satellite simulator which has hot-standby redundancy mechanism, and flight software development and test under this environment.

A Design of Authentication/Security Processor IP for Wireless USB (무선 USB 인증/보안용 프로세서 IP 설계)

  • Yang, Hyun-Chang;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.11
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    • pp.2031-2038
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    • 2008
  • A small-area and high-speed authentication/security processor (WUSB_Sec) IP is designed, which performs the 4-way handshake protocol for authentication between host and device, and data encryption/decryption of wireless USB system. The PRF-256 and PRF-64 are implemented by CCM (Counter mode with CBC-MAC) operation, and the CCM is designed with two AES (Advanced Encryption Standard) encryption coles working concurrently for parallel processing of CBC mode and CTR mode operations. The AES core that is an essential block of the WUSB_Sec processor is designed by applying composite field arithmetic on AF$(((2^2)^2)^2)$. Also, S-Box sharing between SubByte block and key scheduler block reduces the gate count by 10%. The designed WUSB_Sec processor has 25,000 gates and the estimated throughput rate is about 480Mbps at 120MHz clock frequency.

The Horizon Run 5 Cosmological Hydrodynamical Simulation: Probing Galaxy Formation from Kilo- to Giga-parsec Scales

  • Lee, Jaehyun;Shin, Jihey;Snaith, Owain N.;Kim, Yonghwi;Few, C. Gareth;Devriendt, Julien;Dubois, Yohan;Cox, Leah M.;Hong, Sungwook E.;Kwon, Oh-Kyoung;Park, Chan;Pichon, Christophe;Kim, Juhan;Gibson, Brad K.;Park, Changbom
    • The Bulletin of The Korean Astronomical Society
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    • v.45 no.1
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    • pp.38.2-38.2
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    • 2020
  • Horizon Run 5 (HR5) is a cosmological hydrodynamical simulation which captures the properties of the Universe on a Gpc scale while achieving a resolution of 1 kpc. This enormous dynamic range allows us to simultaneously capture the physics of the cosmic web on very large scales and account for the formation and evolution of dwarf galaxies on much smaller scales. Inside the simulation box. we zoom-in on a high-resolution cuboid region with a volume of 1049 × 114 × 114 Mpc3. The subgrid physics chosen to model galaxy formation includes radiative heating/cooling, reionization, star formation, supernova feedback, chemical evolution tracking the enrichment of oxygen and iron, the growth of supermassive black holes and feedback from active galactic nuclei (AGN) in the form of a dual jet-heating mode. For this simulation we implemented a hybrid MPI-OpenMP version of the RAMSES code, specifically targeted for modern many-core many thread parallel architectures. For the post-processing, we extended the Friends-of-Friend (FoF) algorithm and developed a new galaxy finder to analyse the large outputs of HR5. The simulation successfully reproduces many observations, such as the cosmic star formation history, connectivity of galaxy distribution and stellar mass functions. The simulation also indicates that hydrodynamical effects on small scales impact galaxy clustering up to very large scales near and beyond the baryonic acoustic oscillation (BAO) scale. Hence, caution should be taken when using that scale as a cosmic standard ruler: one needs to carefully understand the corresponding biases. The simulation is expected to be an invaluable asset for the interpretation of upcoming deep surveys of the Universe.

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Stereo-To-Multiview Conversion System Using FPGA and GPU Device (FPGA와 GPU를 이용한 스테레오/다시점 변환 시스템)

  • Shin, Hong-Chang;Lee, Jinwhan;Lee, Gwangsoon;Hur, Namho
    • Journal of Broadcast Engineering
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    • v.19 no.5
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    • pp.616-626
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    • 2014
  • In this paper, we introduce a real-time stereo-to-multiview conversion system using FPGA and GPU. The system is based on two different devices so that it consists of two major blocks. The first block is a disparity estimation block that is implemented on FPGA. In this block, each disparity map of stereoscopic video is estimated by DP(dynamic programming)-based stereo matching. And then the estimated disparity maps are refined by post-processing. The refined disparity map is transferred to the GPU device through USB 3.0 and PCI-express interfaces. Stereoscopic video is also transferred to the GPU device. These data are used to render arbitrary number of virtual views in next block. In the second block, disparity-based view interpolation is performed to generate virtual multi-view video. As a final step, all generated views have to be re-arranged into a single image at full resolution for presenting on the target autostereoscopic 3D display. All these steps of the second block are performed in parallel on the GPU device.

High Throughput Parallel Design of 2-D $8{\times}8$ Integer Transforms for H.264/AVC (H.264/AVC 를 위한 높은 처리량의 2-D $8{\times}8$ integer transforms 병렬 구조 설계)

  • Sharma, Meeturani;Tiwari, Honey;Cho, Yong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.8
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    • pp.27-34
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    • 2012
  • In this paper, the implementation of high throughput two-dimensional (2-D) $8{\times}8$ forward and inverse integer DCT transform for H.264 is presented. The forward and inverse transforms are represented using simple shift and addition operations. Matrix decomposition and matrix operation such as the Kronecker product and direct sum are used to reduce the computation complexity. The proposed design uses integer computations and does not use transpose memory and hence, the resource consumption is also reduced. The maximum operating frequency of the proposed pipelined architecture is 1.184 GHz, which achieves 25.27 Gpixels/sec throughput rate with the hardware cost of 44864 gates. High throughput and low hardware makes the proposed design useful for real time H.264/AVC high definition processing.

Highly Efficient and Low Power FIR Filter Chip for PRML Read Channel (PRML Read Channel용 고효율, 저전력 FIR 필터 칩)

  • Jin Yong, Kang;Byung Gak, Jo;Myung Hoon, Sunwoo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.9
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    • pp.115-124
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    • 2004
  • This paper proposes a high efficient and low power FIR filter chip for partial-response maximum likelihood (PRML) disk drive read channels; it is a 6-bit, 8-tap digital FIR filter. The proposed filter employs a parallel processing architecture and consists of 4 pipeline stages. It uses the modified Booth algorithm for multiplication and compressor logic for addition. CMOS pass-transistor logic is used for low power consumption and single-rail logic is used to reduce the chip area. The proposed filter is actually implemented and the chip dissipates 120mV at 100MHz, uses a 3.3V power supply and occupies 1.88 ${\times}$ 1.38 $\textrm{mm}^2$. The implemented filter requires approximately 11.7% less power compared with the existing architectures that use the similar technology.

FLUID SIMULATION METHODS FOR COMPUTER GRAPHICS SPECIAL EFFECTS (컴퓨터 그래픽스 특수효과를 위한 유체시뮬레이션 기법들)

  • Jung, Moon-Ryul
    • 한국전산유체공학회:학술대회논문집
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    • 2009.11a
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    • pp.1-1
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    • 2009
  • In this presentation, I talk about various fluid simulation methods that have been developed for computer graphics special effects since 1996. They are all based on CFD but sacrifice physical reality for visual plausability and time. But as the speed of computer increases rapidly and the capability of GPU (graphics processing unit) improves, methods for more physical realism have been tried. In this talk, I will focus on four aspects of fluid simulation methods for computer graphics: (1) particle level-set methods, (2) particle-based simulation, (3) methods for exact satisfaction of incompressibility constraint, and (4) GPU-based simulation. (1) Particle level-set methods evolve the surface of fluid by means of the zero-level set and a band of massless marker particles on both sides of it. The evolution of the zero-level set captures the surface in an approximate manner and the evolution of marker particles captures the fine details of the surface, and the zero-level set is modified based on the particle positions in each step of evolution. (2) Recently the particle-based Lagrangian approach to fluid simulation gains some popularity, because it automatically respects mass conservation and the difficulty of tracking the surface geometry has been somewhat addressed. (3) Until recently fluid simulation algorithm was dominated by approximate fractional step methods. They split the Navier-Stoke equation into two, so that the first one solves the equation without considering the incompressibility constraint and the second finds the pressure which satisfies the constraint. In this approach, the first step introduces error inevitably, producing numerical diffusion in solution. But recently exact fractional step methods without error have been developed by fluid mechanics scholars), and another method was introduced which satisfies the incompressibility constraint by formulating fluid in terms of vorticity field rather than velocity field (by computer graphics scholars). (4) Finally, I want to mention GPU implementation of fluid simulation, which takes advantage of the fact that discrete fluid equations can be solved in parallel.

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A study of the determination of off-set position for Nd:YAC laser welding between SCP steel sheet and STS304 sheet (Nd:YAG 레이저빔을 이용한 SCP 강판과 STS304강판 용접시 오프셋(off-set) 위치 결정에 관한 연구)

  • Yoon B. S.;Kim T. H.;Park G. Y.;Lee G. D.
    • Laser Solutions
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    • v.7 no.2
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    • pp.1-10
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    • 2004
  • This work was attempted to join SCP sheet and STS304 sheet by using Nd:YAC laser beam. SCP sheet has good formability and low cost, while STS304 has excellent corrosion resistance and mechanical properties in high temp. In this experiment, butt joint type was used to develop the tailored blank welding for dissimilar steel. Sheets which have different thermal properties. Computer simulation was conducted to obtain the off-set position for efficient welding by considering laser power, scanning speed, focal length and basic properties. The result showed that the optimum thermal distribution was obtained when the laser beam was irradiated at $0.05{\sim}0.1$ mm off-set toward the SCP sheet side. The experiment was conducted based on the result of computer simulation to show the same optimum conditions. Optimum conditions were 3KW in laser beam power, 6m/min in scanning speed, -0.5mm in focal position, 0.1mm off-set toward SCP. Microhardness test, tensile test, bulge test, optical microscopy, EDS, and XRD were performed to observe the microstructure around fusion zone and to evaluate the mechanical properties of optimum conditions, The weld zone had high microhardness values by the formation of the martensitic structure. Tensile test measured the strength of welded region by vertical to strain direction and the elongation of welded region by parallel to strain direction. Bulge test showed $52\%$ formability of the original materials. Bead shape, grain size, and martensitic structure were observed by the optical microscopy in the weld zone. Detailed results of EDS, XRD confirmed that the welded region was connected of martensitic structure.

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Efficient Method to Support Mobile Virtualization-based Cloud Resource Management (모바일 가상화기반 클라우드 자원관리를 지원하는 효율적 방법)

  • Kang, Yongho;Jang, Changbok;Lee, Wanjik;Heo, Seokyeol;Kim, Jooman
    • Journal of Digital Convergence
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    • v.12 no.2
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    • pp.277-283
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    • 2014
  • Recently, various cloud service has been being provided on mobile devices as well as desktop pc and server computer. Also, Smartphone users are very rapidly increasing, and they are using it for enjoying various services(cloud service, game, banking service, mobile office, etc.). So, research to utilize resources on mobile device has been conducted. In this paper, We have suggested efficient method of cloud resource management by using information of available physical resources(CPU, memory, storage, etc.) between mobile devices, and information of physical resource in mobile device. Suggested technology is possible to guarantee real-time process and efficiently manage resources.