• Title/Summary/Keyword: and Parallel Processing

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Aerodynamic Shape Optimization using Discrete Adjoint Formulation based on Overset Mesh System

  • Lee, Byung-Joon;Yim, Jin-Woo;Yi, Jun-Sok;Kim, Chong-Am
    • International Journal of Aeronautical and Space Sciences
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    • v.8 no.1
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    • pp.95-104
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    • 2007
  • A new design approach of complex geometries such as wing/body configuration is arranged by using overset mesh techniques under large scale computing environment. For an in-depth study of the flow physics and highly accurate design, several special overlapped structured blocks such as collar grid, tip-cap grid, and etc. which are commonly used in refined drag prediction are adopted to consider the applicability of the present design tools to practical problems. Various pre- and post-processing techniques for overset flow analysis and sensitivity analysis are devised or implemented to resolve overset mesh techniques into the design optimization problem based on Gradient Based Optimization Method (GBOM). In the pre-processing, the convergence characteristics of the flow solver and sensitivity analysis are improved by overlap optimization method. Moreover, a new post-processing method, Spline-Boundary Intersecting Grid (S-BIG) scheme, is proposed by considering the ratio of cell area for more refined prediction of aerodynamic coefficients and efficient evaluation of their sensitivities under parallel computing environment. With respect to the sensitivity analysis, discrete adjoint formulations for overset boundary conditions are derived by a full hand-differentiation. A smooth geometric modification on the overlapped surface boundaries and evaluation of grid sensitivities can be performed by mapping from planform coordinate to the surface meshes with Hicks-Henne function. Careful design works for the drag minimization problems of a transonic wing and a wing/body configuration are performed by using the newly-developed and -applied overset mesh techniques. The results from design applications demonstrate the capability of the present design approach successfully.

Optimizing the Chien Search Machine without using Divider (나눗셈회로가 필요없는 치엔머신의 최적설계)

  • An, Hyeong-Keon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.5
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    • pp.15-20
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    • 2012
  • In this paper, we show new method to find the error locations of received Reed-Solomon code word. New design is much faster and has much simpler logic circuit than the former design method. This optimization was possible by very simplified square/$X^4$ calculating circuit, parallel processing and not using the very complex Divider. The Reed Solomon decoder using this new Chien Machine can be applicated for data protection of almost all digital communication and consumer electronic devices.

Impelmentation of 2-DOF Controller Using Immune Algorithms

  • Kim, Dong-Hwa
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1531-1536
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    • 2003
  • In this paper the structure of 2-DOF controller based on artificial immune network algorithms has been suggested for nonlinear system. Up to present time, a number of structures of the 2-DOF controllers are considered as 2-DOF (2-Degrees Of Freedom) control functions. However, A general view is provided that they are the special cases of either the state feedback or the modification of PID controllers. On the other hand, The immune network system possesses a self organizing and distributed memory, also it has an adaptive function by feed back law to its external environment and allows a PDP (parallel distributed processing) network to complete patterns against the environmental situation, since antibody recognizes specific antigens which are the foreign substances that invade living creatures. Therefore, it can provide optimal solution to external environment. Simulation results by immune based 2-DOF controller reveal that immune algorithm is an effective approach to search for 2-DOF controller.

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A study on the Electrical Load Pattern Classification and Forecasting using Neural Network (신경회로망을 이용한 전력부하의 유형분류 및 예측에 관한 연구)

  • Park, June-Ho;Shin, Gil-Jae;Lee, Hwa-Suk
    • Proceedings of the KIEE Conference
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    • 1991.11a
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    • pp.39-42
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    • 1991
  • The Application of Artificial Neural Network(ANN) to forecast a load in a power system is investigated. The load forecasting is important in the electric utility industry. This technique, methodology based on the fact that parallel structure can process very fast much information is a promising approach to a load forecasting. ANN that is highly interconnected processing element in a hierachy activated by the each input. The load pattern can be divided distinctively into two patterns, that is, weekday and weekend. ANN is composed of a input layer, several hidden layers, and a output layer and the past data is used to activate input layer. The output of ANN is the load forecast for a given day. The result of this simulation can be used as a reference to a electric utility operation.

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Performance Evaluation of Unimodular and Non-unimodular Transformation (Unimodular 및 Non-unimodular 변환의 성능평가)

  • Song Worl-Bong
    • Journal of the Korea Computer Industry Society
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    • v.6 no.2
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    • pp.365-372
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    • 2005
  • Generally, In a application program the core part for parallel processing is a loop. therefore exist data dependencies between the array index variables of a loop. The data dependence relations between statements which from variable or constant dependence distance are specially complex. Therefore extracting parallelism for those statements at compile time is very difficult. in this paper, among the proposed methods of extracting parallelism, analysis the unimodular method and non-unimodular method and grasping the merits and demerits of them. hereafter, this method will go far toward solving the effectively extracting parallelism of the loop.

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Design of High-speed Pointer Switching Fabric (초고속 포인터 스위칭 패브릭의 설계)

  • Ryu, Kyoung-Sook;Choe, Byeong-Seog
    • Journal of Internet Computing and Services
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    • v.8 no.5
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    • pp.161-170
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    • 2007
  • The proposed switch which has separated data plane and switching plane can make parallel processing for packet data storing, memory address pointer switching and simultaneously can be capable of switching the variable length for IP packets. The proposed architecture does not require the complicated arbitration algorithms in VOQ, also is designed for QoS of generic output queue switch as well as input queue. At the result of simulations, the proposed architecture has less average packet delay than the one of the memory-sharing based architecture and guarantees keeping a certain average packet delay in increasing switch size.

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A Web-based Solver for solving the Reliability Optimization Problems (신뢰도 최적화 문제에 대한 웹기반의 Solver 개발)

  • 김재환
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.8 no.1
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    • pp.127-137
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    • 2002
  • This paper deals with developing a Web-based Solver NRO(Network Reliability Optimizer) for solving three classes of reliability redundancy optimization problems which are generated in series systems. parallel systems and complex systems. Inputs of NRO consisted in four parts. that is, user authentication. system selection. input data and confirmation. After processing of inputs through internet, NRO provides conveniently the optimal solutions for the given problems on the Web-site. To alleviate the risks of being trapped in a local optimum, HH(Hybrid-Heuristic) algorithm is incorporated in NRO for solving the given three classes of problems, and moderately combined GA(Genetic Algorithm) with the modified SA(Simulated Annealing) algorithm.

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Inductor Characteristics Analysis in High Power Interleaved Buck Converter

  • Yun, Chul;Yoon, Byungkeun;Kwon, Woohyen;Kim, Woohyun
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.1
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    • pp.47-52
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    • 2017
  • Inductor in high power converter system increases production cost, volume and core loss proportional to the power. To decrease these disadvantages, this paper analyzed the characteristic of parallel-inductor and coupled-inductor in interleaved system with simulation. As a result, it is confirmed that two-phase interleaved non-coupled buck-converter has the best characteristic among three types converter.

Laser Drilling of High-Density Through Glass Vias (TGVs) for 2.5D and 3D Packaging

  • Delmdahl, Ralph;Paetzel, Rainer
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.2
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    • pp.53-57
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    • 2014
  • Thin glass (< 100 microns) is a promising material from which advanced interposers for high density electrical interconnects for 2.5D chip packaging can be produced. But thin glass is extremely brittle, so mechanical micromachining to create through glass vias (TGVs) is particularly challenging. In this article we show how laser processing using deep UV excimer lasers at a wavelength of 193 nm provides a viable solution capable of drilling dense patterns of TGVs with high hole counts. Based on mask illumination, this method supports parallel drilling of up over 1,000 through vias in 30 to $100{\mu}m$ thin glass sheets. (We also briefly discuss that ultrafast lasers are an excellent alternative for laser drilling of TGVs at lower pattern densities.) We present data showing that this process can deliver the requisite hole quality and can readily achieve future-proof TGV diameters as small $10{\mu}m$ together with a corresponding reduction in pitch size.

A New Synchronization Scheme for Parallel Processing on Perfectly Nested Do Loops (완전 중첩 루프에서 병렬처리를 위한 새로운 동기화 기법)

  • 이광형;황종선;박두순;김병수
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.10
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    • pp.1-10
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    • 1994
  • In most application programs, loops usually contain most of the computation in a program and are the most improtant source of parallelism. When loops are executed on multiprocessors, the cross iteration data dependences need to be enforced by synchronization between processors. In this paper, we propose a new synchronization scheme(Free/Hold) for reducing overgeads occured by synchronization variables in data oriented scheme and delay of time occured by synchronization instruction in statement oriented scheme. The Free/Hold mechanism enforces the correct execution order by inserting synchronization instruction between each instance with data dependence relationship using the RD(Real dependence Distance). We also present an algorithm for removing unnecessary dependences in one-to-many dependences.

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