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  • Title/Summary/Keyword: amorphous silicon (a-Si)

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Charactrerization of microstructure, hardness and oxidation behavior of carbon steels hot dipped in Al and Al-1% Si molten baths (Al과 Al-1% Si 용융조에서 용융 도금된 탄소강의 경도, 산화 및 미세조직의 특성)

  • Hwang, Yeon-Sang;Won, Seong-Bin;Chunyu, Xu;Lee, Dong-Bok
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2013.05a
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    • pp.109-110
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    • 2013
  • Medium carbon steel was aluminized by hot dipping into molten Al or Al-1%Si baths. After hot-dipping in these baths, a thin Al-rich topcoat and a thick alloy layer rich in Al5Fe2 formed on the surface. A small a mount of FeAl and Al3Fe was incorporated in the alloy layer. Silicon from the Al-1%Si bath was uniformly distributed throughout the entire coating. The hot dipping increased the microhardness of the steel by about 8 times. Heating at 7001000C however decreased the microhardness through interdiffusion between the coating and the substrate. The oxidation at 7001000C in air formed a thin protective αAl2O3 layer, which provided good oxidation resistance. Silicon was oxidized to amorphous silica, exhibiting a glassy oxide surface.

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A study on noise properties of Co films deposited on Si (실리콘 기판에 증착된 코발트 박막의 잡음특성 연구)

  • 조남인;유순재
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.2
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    • pp.122-130
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    • 1996
  • In an effort to learn more about the reaction mechanisms which lead to the compound nucleation at the interface of cobalt and silicon, electrical noise properties has been investigated for cobalt thin films deposited on silicon substrates by the electron beam evaporation and rf sputtering techniques. Microstructural variations at the Co/Si interfaces have been observed by transmission electronmicroscopy. Amorphous structures are observed at the Co/Si interfaces for samples whose cobalt thicknesses are less than 4nm and a polycrystalline compound nucleation has been occurred for thicker films. 1/f noise power same samples, and the spetral density has been normalized. The amplitude of 1/f noise power spectral density shows a gradual increase as the cobalt thickness is increased, and the amplitude has dropped abruptly after the compound nucleation. The variations of the noise parameters areassumed to be an indiction of the phase transformation along the nucleation reaction path, and amplitude has been interpreted as instabilities of the Co/Si interfacial structures.

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The Effect of Plasma Power on the Composition and Microhardness of a-SiC:H Films Grown by PECVD

  • Lee, Young-Ku-K;Kim, Yunsoo
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.123-123
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    • 1999
  • Amorphous hydrogenated silicon carbide (a-SiC:H) films were deposited at the temperature of 400C using plasma enhanced chemical vapor deposition. The a-SiC:H films were characterized by x-ray photoelectron spectroscopy (XPS) and nanoindentation method. By increasing the plasma power from 20W to 160W, the oxygen content of the a-SiC:H films were observed to decrease from 12.1% to 4.4%. On the other hand, the plasma power did not affect the ratio of carbon to silicon in our experiment where the 1, 3-disilabutane was used as the precursor. Microhardness of the films was observed to increase as the plasma power increased, while the elastic modulus was observed to gave a maximum value at the plasma power of 80W. Microhardness of the film is thought to be strongly affected by the content of adventitious oxygen in the film and it is concluded that the hardness of the film can be improved by increasing the plasma power.

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A Study on the Energy Band of Amorphous Silicon using a Two-Dimensional Device Simulator(TFT2DS) (이차원 소자 시뮬레이터를 이용한 비정질 실리콘 에너지대에 관한 연구)

  • 곽지훈;이영삼;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.325-327
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    • 1997
  • TFT2DS was developed to provide the usability as an analytic and design tool. The static characteristics of a-Si TFTs demonstrated a good agreement between simulated and measured data. This paper shows that WDS can optimize the physical parameters of a-Si through sensitivity simulations and compute the static characteristics of a-Si TFTs.

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Effects of Neutral Particle Beam on Nano-Crystalline Silicon Thin Film Deposited by Using Neutral Beam Assisted Chemical Vapor Deposition at Room Temperature

  • Lee, Dong-Hyeok;Jang, Jin-Nyoung;So, Hyun-Wook;Yoo, Suk-Jae;Lee, Bon-Ju;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.254-255
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    • 2012
  • Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (μ-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

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a-Si:H Photodiode Using Alumina Thin Film Barrier

  • Hur Chang-Wu;Dimitrijev Sima
    • Journal of information and communication convergence engineering
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    • v.3 no.4
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    • pp.179-183
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    • 2005
  • A photodiode capable of obtaining a sufficient photo/ dark current ratio at both forward bias state and reverse bias state is proposed. The photodiode includes a glass substrate, an aluminum film formed as a lower electrode over the glass substrate, an alumina film formed as an insulator barrier over the aluminum film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the alumina film, and a transparent conduction film formed as an upper electrode over the hydro-generated amorphous silicon film. A good quality alumina (Al2O3) film is formed by oxidation of aluminum film using electrolyte solution of succinic acid. Alumina is used as a potential barrier between amorphous silicon and aluminum. It controls dark-current restriction. In case of photodiodes made by changing the formation condition of alumina, we can obtain a stable dark current (\~1012A) in alumina thickness below 1000\AA. At the reverse bias state of the negative voltage in ITO (Indium Tin Oxide), the photo current has substantially constant value of 5×109 A at light scan of 100 1x. On the other hand, the photo/dark current ratios become higher at smaller thicknesses of the alumina film. Therefore, the alumina film is used as a thin insulator barrier, which is distinct from the conventional concept of forming the insulator barrier layer near the transparent conduction film. Also, the structure with the insulator thin barrier layer formed near the lower electrode, opposed to the ITO film, solves the interface problem of the ITO film because it provides an improved photo current/dark current ratio.

Computer simulation for the effects of inserting the textured ZnO and buffer layer in the rear side of ZnO/nip-SiC: H/metal type amorphous silicon solar cells (Zno/nip-SiC:H/금속기판 구조 비정질 실리콘 태양전지의 후면 ZnO 및 완충층 삽입 효과에 대한 컴퓨터 수치해석)

  • Jang, Jae-Hoon;Lim, Koeng-Su
    • Proceedings of the KIEE Conference
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    • 1994.07b
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    • pp.1277-1279
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    • 1994
  • In the structure of ZnO/nip-SiC: H/metal substrate amorphous silicon (a-Si:H) solar cells, the effects of inserting a rear textured ZnO in the p-SiC:H/metal interface and a graded bandgap buffer layer in the i/p-SiC:H have been analysed by computer simulation. The incident light was taken to have an intensity of 100mW/cm2(AM-1). The thickness of the a-Si:H n, δ-doped a-SiC:H p, and buffer layers was assumed to be 200\AA,66\AA, and 80\AA, respectively. The scattering coefficients of the front and back ZnO were taken to be 0.2 and 0.7, respectively. Inserting the rear buffer layer significantly increases the open circuit voltage(Voc) due to reduction of the i/p interface recombination rate. The use of textured ZnO markedly improves collection efficiency in the long wavelengths( above 550nm ) by back scattering and light confinement effects, resulting in dramatic enhancement of the short circuit current density(Jsc). By using the rear buffer and textured ZnO, the i-layer thickness of the ceil for obtaining the maximum efficiency becomes thinner(2500\AA). From these results, it is concluded that the use of textured ZnO and buffer layer at the backside of the ceil is very effective for enhancing the conversion efficiency and reducing the degradation of a-Si:H pin-type solar cells.

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Simple Synthesis of SiOx by High-Energy Ball Milling as a Promising Anode Material for Li-Ion Batteries

  • Sung Joo, Hong;Seunghoon, Nam
    • Corrosion Science and Technology
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    • v.21 no.6
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    • pp.445-453
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    • 2022
  • SiOx was prepared from a mixture of Si and SiO2 via high-energy ball milling as a negative electrode material for Li-ion batteries. The molar ratio of Si to SiO2 as precursors and the milling time were varied to identify the synthetic condition that could exhibit desirable anode performances. With an appropriate milling time, the material showed a unique microstructure in which amorphous Si nanoparticles were intimately embedded within the SiO2 matrix. The interface between the Si and SiO2 was composed of silicon suboxides with Si oxidation states from 0 to +4 as proven by X-ray photoelectron spectroscopy and electrochemical analysis. With the addition of a conductive carbon (Super P carbon black) as a coating material, the SiOx/C manifested superior specific capacity to a commercial SiOx/C composite without compromising its cycle-life performance. The simple mechanochemical method described in this study will shed light on cost-effective synthesis of high-capacity silicon oxides as promising anode materials.

Development of a Low Temperature Doping Technique for Application in Poly-Si TFT on Plastic Substrates

  • Hong, Wan-Shick;Kim, Jong-Man
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.1131-1134
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    • 2003
  • A low temperature doping technique has been studied for application in poly-Si TFT's on plastic substrates. Heavily-doped amorphous silicon layers were deposited on poly-Si and the dopant atoms were driven in by subsequent excimer laser annealing. The entire process was carried out under a substrate temperature of 120C, and a sheet resistance as low as 300Ω/sq. was obtained.

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New Process Development for Hybrid Silicon Thin Film Transistor

  • Cho, Sung-Haeng;Choi, Yong-Mo;Jeong, Yu-Gwang;Kim, Hyung-Jun;Yang, Sung-Hoon;Song, Jun-Ho;Jeong, Chang-Oh;Kim, Shi-Yul
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.205-207
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    • 2008
  • The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of 45cm2/Vs and 0.5cm2/Vs for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ (1440×900) LCD Panel.

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