• Journal of KIISE:Computing Practices and Letters
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• v.8 no.6
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• pp.717-726
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• 2002

In this study, we analyze hardware implementation schemes of the ARS(Advanced Encryption Standard-128) algorithm that has recently been selected as the standard cypher algorithm by NIST(National Institute of Standards and Technology) . The implementation schemes include the basic architecture, loop unrolling, inner-round pipelining, outer-round pipelining and resource sharing of the S-box. We used MaxPlus2 9.64 for VHDL design and simulations and FLEX10KE-family FPGAs produced by Altera Corp. for implementations. According to the results, the four-stage inner-round pipelining scheme shows the best performance vs. cost ratio, whereas the loop unrolling scheme shows the worst.

• Journal of IKEEE
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• v.18 no.2
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• pp.198-205
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• 2014

As the development of information technology, the interests in tiny applications such as wearable devices, portable devices and RFID are increased and the importance of low-area encryption circuit is emphasized. This paper proposes a compact architecture of AES-based encryption circuit suitable for tiny applications. The circuit area is reduced by minimizing storage space and sharing computation resources. The synthesized gate-level circuit using 65nm standard cell library consists of 2,241 gates and two $8{\times}16$-bit SRAMs. It can process data at a rate of 50.57Mbits per second. Therefore, the proposed encryption circuit is suitable for various applications requiring very small encryption circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.759-762
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• 2017

The proposed scheme is proposed secure transmission of fixed data and unstructured data among medical information transmitted in PACS. Unstructured data uses the AES encryption algorithm as sensitive data And transmitted using encrypted mosaic encryption techniques for the non-identification of medical images, which are regular data. In addition, we have experimented with increasing the key size for encryption. As a result, we did not notice any significant difference between 128 - bit size and 128 - key size even when encrypting the size of 196,256.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.79-82
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• 1998

Film characteristics of thin ONO dielectric layers for MONOS(metal-oxide-nitride-oxide-semiconductor) EEPRM was investigated by AES and AFM. Second derivative spectra of AES Si LVV overlapping peak provided useful information for chemical state analysis of superthin film. The ONO films with dimension of tunneling oxide 24${\AA}$, nitride 33${\AA}$, and blocking oxide 40${\AA}$ were fabricated. During deposition of the LPCVD nitride films on tunneling oxide, this thin oxide was nitrized. When the blocking oxide were deposited on the nitride film, the oxygen not only oxidized the nitride surface, but diffused through the nitride. The results of ONO film analysis exhibits that it is made up of SiO$_2$(blocking oxide)/O-rich SiON(interface/N-rich SiON(nitride)/-rich SiON(interface)/N-rich SiON(nitride)/O-rich SiON(tunneling oxide).

• ETRI Journal
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• v.33 no.4
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• pp.611-620
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• 2011

Since card-type one-time password (OTP) generators became available, power and area consumption has been one of the main issues of hardware OTPs. Because relatively smaller batteries and smaller chip areas are available for this type of OTP compared to existing token-type OTPs, it is necessary to implement power-efficient and compact dedicated OTP hardware modules. In this paper, we design and implement a low-power small-area hardware OTP generator based on the Advanced Encryption Standard (AES). First, we implement a prototype AES hardware module using a 350 nm process to verify the effectiveness of our optimization techniques for the SubBytes transform and data storage. Next, we apply the optimized AES to a real-world OTP hardware module which is implemented using a 180 nm process. Our experimental results show the power consumption of our OTP module using the new AES implementation is only 49.4% and 15.0% of those of an HOTP and software-based OTP, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.77-86
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• 2010

This paper presents an efficient secure scan design technique which is based on a fake key and IEEE 1149.1 instruction to protect secret key from scan-based side channel attack for an Advanced Encryption Standard (AES) core embedded on an System-on-a-Chip (SoC). Our proposed secure scan design technique can be applied to crypto IP core which is optimized for applications without the IP core modification. The IEEE 1149.1 standard is kept, and low area, low power consumption, very robust secret-key protection and high fault coverage can be achieved compared to the existing methods.

• Infection and chemotherapy
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• v.50 no.4
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• pp.301-310
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• 2018

Backgroud: Influenza vaccination is recommended for adults aged ${\geq}65$ years as they are at high risk of significant morbidity and mortality. This open-label, multicenter, post-marketing surveillance study assessed the safety of the MF59-adjuvanted trivalent inactivated subunit influenza vaccine, which is marketed as $FLUAD^{(R)}$ and $VANTAFLU^{(R)}$, in South Korean subjects aged ${\geq}65$ years. Materials and Methods: Solicited local and systemic adverse events (AEs) were collected from day 1 to 4 of the study. All unsolicited AEs and serious AEs (SAEs) were recorded from day 1 until study termination (day 29). Results: Of the 770 subjects enrolled ($FLUAD^{(R)}$, n = 389; $VANTAFLU^{(R)}$, n = 381), 39% overall experienced any solicited AE. Local AEs were reported by 33% of subjects overall; with the most common events being injection-site pain (30%) and tenderness (27%). Systemic AEs were reported by 19% of subjects overall with the most common events being myalgia (11%) and fatigue (8%). Conclusion: These results show that the MF59-adjuvanted influenza vaccine known as $FLUAD^{(R)}$ or $VANTAFLU^{(R)}$ had acceptable safety profiles in older adults (aged ${\geq}65$ years) in South Korea.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.5
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• pp.167-174
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• 2009

Recently, Li et al. proposed a new differential fault analysis(DFA) attack on the block cipher ARIA using about 45 ciphertexts. In this paper, we apply their DFA skill on AES and improve attack method and its analysis. The basic idea of our DFA method is that we recover intermediate ciphertexts in last round using final faulty ciphertexts and find out last round secret key. In addition, we present detail DFA procedure on AES and analysis of complexity. Furthermore computer simulation result shows that we can recover its 128-bit secret key by introducing a correct ciphertext and 2 faulty ciphertexts.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.11 no.6
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• pp.67-76
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• 2001

In this paper, we investigate criteria for evaluating cryptographic strength based on randomness testing of the advanced encryption standard candidates, which have conducted by NIST(National Institute of Standards & Technology). It is difficult to prove that a given cryptographic algorithm meets sufficient conditions or requirements for provable security. The statistical testing of random number generators is one of methods to evaluate cryptographic strength and is based on statistical properties of random number generators. We apply randomness testing on several cryptographic algorithms that have not been tested by NIST and find criteria for evaluating cryptographic strength from the results of randomness testing. We investigate two criteria, one is the number of rejected samples and the other is the p-value from p-values of the samples.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.20 no.6
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• pp.59-65
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• 2010

Since an attacker can occur an error in cryptographic device during encryption process and extract secret key, the fault injection attack has become a serious threat in chip security. In this paper, we show that an attacker can retrieve the 128-bits secret key using fault injection attack on the for statement of final round key addition in AES implementation. To verify possibility of our proposal, we implement the AES system on ATmega128 microcontroller and try to inject a fault using laser beam. As a result, we can extract 128-bits secret key through just one success of fault injection.