Design of Low-power Clock Generator Synchronized with the AC Power Source Using the ADCL Buffer for Adiabatic Logics (ADCL 버퍼를 이용한 단열 논리회로용 AC 전원과 동기화된 저전력 클럭 발생기 설계)
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- The Journal of the Korea institute of electronic communication sciences
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- v.7 no.6
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- pp.1301-1308
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- 2012