• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05a
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• pp.149-152
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• 2002

If the ambient temperature rises for AC PDP, some of the discharge cells are turned off because of the misfiring during address period. Particularly, the misfiring of the 'last scan line is more serious than that of the first. In order to compensate the misfiring in such that case, different addressing voltage is applied at each cell such as progressively increasing pulse voltage instead of constant one. As a result, the addressing time and discharge charge of the last scan line have become similar to those of the first scan line and the phenomenon of misfiring has disappeared.

• Journal of KIEE
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• v.11 no.1
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• pp.27-32
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• 2001

In this study, the luminance, luminous efficiency and address time of an PDP as a parameter of the phosphor thickness and the size of discharge space are investigated. The maximum luminance and luminous efficiency are obtained at the phosphor thickness of 30 ${\mu}{\textrm}{m}$ for the rib height of 110 ${\mu}{\textrm}{m}$. For the rib height of 120~160 ${\mu}{\textrm}{m}$, the maximum values are obtained at the thickness of 50 ${\mu}{\textrm}{m}$ regardless of the kind of R, G and B phosphor. These results do not affected by the variation of discharge space. The average decrease rate of the total charge to the phosphor thickness is about 3.35pc/cell/10 ${\mu}{\textrm}{m}$ and the average increase rate of the addressing time is about 0.027 $mutextrm{s}$/10 ${\mu}{\textrm}{m}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.112-116
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• 2000

In this paper, we investigated the relationship between the position of bus electrode and address time, luminance and luminous efficiency in ac PDP of 50in. XGA resolution. When the bus electrode was placed in which was about $140{\mu}m$ apart from discharge gap, the luminous efficiency was the highest and address time was the least. Whereas, when the bus electrode was placed in the edge of ITO, the luminance was the highest.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.247-250
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• 2005

In this paper, new address electrode having separated dual electrodes is suggested to reduce addressing time in ac PDP. It had been found that both the formative and jitter width of the suggested electrode are improved by $10{\sim}20$ % compared with the conventional one on IMID 04'. So we experiment other several kinds of the separated electrodes, and the change in discharge characteristics is analyzed by using a two-dimensional fluid simulation. The key feature of the suggested structure is that the distribution of Xe and Ne ion is controllable during the address periods without significant increases in the capacitive load of the address electrodes.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.5
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• pp.239-244
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• 2006

To drive the high-image quality plasma displays of XGA and/or full-HD, we must effectively improve the driving waveform, which get the reset period for the stabilized control of wall charges, the address period to select discharge or non-discharge, and sustain period for luminance in 1 TV-frame, and also the display quality. To accomplish them, the development of the technology for the fast address discharge is required. In this paper, the correlation between the sustain-electrode gap and address discharge characteristics for the high-speed addressing was analyzed using the measurements of dynamic voltage margins. Results showed that the narrower the gap between the sustain electrodes, the narrower the with of the scan pulse became and a dynamic margin of data voltage of 29.2 V was obtained at scan pulse width of $1.0{\mu}s\;and\;V_{ramp}$ of 240 V for driving 4-inch test penal, which the gap between sustain electrodes was $65{\mu}m$.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.15 no.6
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• pp.1-7
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• 2001

To analyze the driving principle of PDP, the influence on the discharge characteristics of space charge was researched. Space charge generated by the priming discharge shortens delay time of the discharge which happens as follows and shorts response time. Such influences are valid up to about 30㎲ after generating priming discharge. This space charge decreases dicharge ignition voltage of the cell near priming cell and the influences are most greatly alerted on the discharge of cell which is adjacent most. And the dependency to spare charge strengthens because discharge ignition voltage drop grows by narrowing of discharge pulse width. But the influence on space charge was observed very slightly in pulse width 1㎲ or more. Therefore, to cause a steady discharge, pulse width should become 1㎲ or more at least without being influenced for space charge of the adjoining discharge.

• Journal of Power Electronics
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• v.9 no.6
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• pp.884-891
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• 2009

An address voltage stabilization circuit for the single-side driving (SSD) method for AC plasma display panels (PDP) is proposed. The single-side driving method, which eliminates a common sustaining driver, uses only two electrodes in a three electrode AC PDP structure. The high-impedance (Hi-Z) mode operation of the data drive ICs during the sustaining period is needed for surface gas-discharge without misfiring in the SSD method but it produces the problem that the address voltage increases up to the breakdown voltage. The proposed circuit based on a flyback converter can stabilize the address voltage under the breakdown voltage and provide better surface gas-discharge performance without any misfiring in the SSD scheme.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.6
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• pp.1151-1156
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• 2009

Unstable sustain discharges can occur at the bottom cells of the panel at high temperature. To solve this problem, the wall charge variation during an address period was investigated. A test panel of 7.5 inch XGA level was used and one green cell was measured. In order to realize operating condition equal to that of the bottom cells of 50 inch panel, the addressing stress pulses are applied. It seems that the resultant wall charge loss during address period increased with increase of stress time, temperature, pressure and Xe %. Wall charge loss increases with potential difference between scan electrode and address electrode, therefore wall charge loss can be minimized by the increase of scan voltage during address period.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.355-358
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• 2008

We report a method for improving characteristics of AC PDP in this study. This improvement is obtained by spreading MgO nanoparticles on transparent dielectric layer. These nanoparticles are covered with MgO protective layer by electron beam evaporation. MgO nanoparticle has difference in cathodoluminescence stronger than MgO layer by electron beam evaporation. This method worked for reducing statistical delay especially. Efficacy, discharge voltage and luminance were also improved But these improvements has limited lifetime because continuous ion bombardments changed characteristic of MgO surface.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.164-170
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• 2004

Misfiring is often observed during the high temperature quality assurance test of plasma display panel. This limits the productivity of PDP industry. In this paper, experimental observations on the misfiring at high panel temperature have been performed through time dependent discharge light output and static margin measurement. For the high temperature condition, firing voltage increment is found in both surface and facing discharges. This in turn increases time lag in address discharge, and results in increment of misfiring probability. In order to reduce this kind of misfiring, a new method that applies automatically different slope of ramp erasing pulse on the common electrode according to temperature variation is proposed. The experimental results show that controlling the slope of ramp erasing pulse is quite effective for compensating temperature-dependent variation of reset and address discharge.