• ETRI Journal
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• v.35 no.2
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• pp.226-233
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• 2013

This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only $0.4{\mu}W$ from a supply voltage of ${\pm}0.6V$ and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using $0.18-{\mu}m$ CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.3
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• pp.168-172
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• 2005

In this paper, we present a new adaptive biasing scheme for CMOS op-amps. The designed circuit has been used in an Operational Transconductance Amplifier (OTA) with ${\pm}1$ V power supply, and it has improved the positive and negative slew rates from 2.92 V/msec to 1242 V/msec and from 1.56 V/msec to 133 V/msec respectively, while maintaining all the small-signal performance parameter values the same as that without adaptive biasing (as expected), however, there was a marginal decrease of the dynamic range. The most useful features of the proposed circuit are that it uses a very low number of components (thus not creating severe area penalty) and requires only 25 nW of extra stand-by power.

• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.317-319
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• 2003

This paper describes an adaptive distance relay for double-circuit line protection with mutual impedance and fault resistance. Double-circuit lines have two operating condition; both lines of a double-circuit line are in operation and one line is switched-off and both ends of the line are grounded. For optimal distance protection, the trip region is calculated, which have respect to mutual impedance and fault resistance.

• Journal of the Semiconductor & Display Technology
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• v.10 no.1
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• pp.113-118
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• 2011

This paper proposes computer visual inspection algorithms for PCB defects which are found in a manufacturing process. The proposed method can detect open circuit and short circuit on bare PCB without using any reference images. It performs adaptive threshold processing for the ROI (Region of Interest) of a target image, median filtering to remove noises, and then analyzes connected components of the binary image. In this paper, the connected components of circuit pattern are defined as 6 types. The proposed method classifies the connected components of the target image into 6 types, and determines an unclassified component as a defect of the circuit. The analysis of the original target image detects open circuits, while the analysis of the complement image finds short circuits. The machine vision inspection system is implemented using C language in an embedded Linux system for a high-speed real-time image processing. Experiment results show that the proposed algorithms are quite successful.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.1069-1070
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• 2013

• Proceedings of the KOSOMBE Conference
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• v.1992 no.05
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• pp.79-81
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• 1992

This paper describes the design of an adaptive closed circuit anesthesia controller based on a multiplexed mass spectrometer system. The controller deals with measurement deterioration caused by measurement delay and rise time through a tong catheter as well as long sampling times due to the multiplexed measurements. Measurement data is extrapolated between sampling periods to increase the estimation convergence rate. A multiple-step-ahead predictive control algorithm is used to calculate intermediatc control inputs between sampling intervals. Simulations are used to validate the designed controller.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1047-1053
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• 2011

In this paper, we proposed an HF-band wireless power transfer system with adaptive frequency control circuit for efficiency enhancement in a short range. In general, a wireless power transfer system shows an impedance mismatching due to a reflected impedance, because a coupling coefficient is varied with respect to separation distance between two resonating loop antennas. The proposed method can compensate this impedance mismatching by varying input frequency of a voltage-controlled oscillator adaptively with respect to separation distance. Therefore, transmission efficiency is enhanced in a short distance, where large impedance mismatch occurs. The adaptive frequency circuit consists of a directional coupler, a detector, and a loop filter. In order to demonstrate the performance of the proposed system, a wireless power transfer system with adaptive frequency control circuits is designed and implemented, which has a pair of loop antennas with a dimension of 30${\times}$30 $cm^2$. From measured results, the proposed system shows enhanced efficiency performance than the case without adaptive frequency control.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.563-569
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• 2015

For some low-frequency applications such as power-related circuits, NEM relays have been known to show better performance than MOSFETs. For example, in a step-down charge pump circuit, the NEM relays showed much smaller layout area and better energy efficiency than MOSFETs. However, severe process variations of NEM relays hinder them from being widely used in various low-frequency applications. To mitigate the process-variation problems of NEM relays, in this paper, a new NEM-relay charge pump circuit with the self-adjustment is proposed. By self-adjusting a pulse amplitude voltage according to process variations, the power consumption can be saved by 4.6%, compared to the conventional scheme without the self-adjustment. This power saving can also be helpful in improving the power efficiency of the proposed scheme. From the circuit simulation of NEM-relay charge pump circuit, the efficiency of the proposed scheme is improved better by 4.1% than the conventional.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.32-37
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• 2007

A DMB CMOS power amplifier (PA) with high efficiency and linearity is present. For this work, a 0.13-um standard CMOS process is employed and all components of the proposed PA are fully integrated into one chop including output matching network and adaptive bias control circuit. To improve the efficiency and linearity simultaneously, an adaptive bias control circuit is adopted along with second harmonic termination circuit at the drain node. The PA is shown a $P_{1dB}$ of 16.64 dBm, power added efficiency (PAE) of 38.31 %, and power gain of 24.64 dB, respectively. The third-order intermodulation (IMD3) and the fifth-order intermodulation (IMD5) have been -24.122 dBc and -37.156 dBc, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.155-167
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• 2015

An adaptive equalization scheme based on all-digital jitter measurement is proposed for a continuous time linear equalizer (CTLE) preceding a clock and data recovery (CDR) in a receiver circuit for high-speed serial interface. The optimum equalization coefficient of CTLE is determined during the initial training period based on the measured jitter. The proposed circuit finds automatically the optimum equalization coefficient for CTLE with 20", 30", 40" FR4 channel at the data rate of 5 Gbps. The chip area of the equalizer including the adaptive controller is 0.14 mm2 in a $0.13{\mu}m$ process. The equalizer consumes 12 mW at 1.2 V supply during the normal operation. The adaptive equalizer has been applied to a USB3.0 receiver.