• Title/Summary/Keyword: adaptive circuit

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Adaptive Learning Circuit of Neural Network applying the MFSFET device (MFSFET 소자를 이용한 뉴럴 네트워크의 적응형 학습회로)

  • 이국표;강성준;윤영섭
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.36-39
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    • 2000
  • The adaptive learning circuit is designed the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportioned to the source-drain resistance of MFSFET and the capacitance of the circuit. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of imput pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, the frequency modulation characteristics of the adaptive learning circuit, that is, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse are confirmed.

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Design of the Adaptive Learning Circuit by Enploying the MFSFET (MFSFET 소자를 이용한 Adaptive Learning Curcuit 의 설계)

  • Lee, Kook-Pyo;Kang, Seong-Jun;Chang, Dong-Hoon;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.8
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    • pp.1-12
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    • 2001
  • The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results are analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, the frequency modulation characteristic of the adaptive learning circuit are confirmed. In other words, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of nueral networks.

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High PAE Power Amplifier Using Adaptive Bias Control Circuit for Wireless Power Transmission (적응형 바이어스 조절 회로를 사용한 무선에너지 전송용 고효율 전력증폭기)

  • Hwang, Hyunwook;Seo, Chulhun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.10
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    • pp.43-46
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    • 2012
  • In this paper, high efficiency power amplifier is implemented with high gain amplifier. Two-stage amplifier using adaptive bias control circuit improve efficiency at low input power. Fixed bias circuit and adaptive bias circuit both have about 76 % efficiency at maximum power level. However amplifier using an adaptive bias control circuit has 70 % at 6 dBm input power level when the amplifier using fixed bias circuit has 50%. The proposed power amplifier using the adaptive bias control circuit can have high efficiency at lower power level.

Equivalent Circuit Modeling applying Adaptive Frequency Sampling (Adaptive Frequency Sampling 을 이용한 등가회로 모델링)

  • Paek, Hyun;Kim, Koon-Tae;Kahng, Sung-Tek;Kim, Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
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    • 2009.08a
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    • pp.281-284
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    • 2009
  • In this paper, we propose a method that applies Adaptive Frequency Sampling(AFS) technique to the equivalent circuit model for RF passive components. Thes days wireless communication system is getting smaller and smaller. So EMI/EMC is an issue in RF. We can solve PI(Power Integrity)/SI(Signal Integrity) that one of EMI/EMC problem apply IFFT for 3D EM simulation multiple with input signal. That is time comuming task. Therefore equivalent circuit model using RF passive component is important. AFS schemes are implemented to obtain the rational functions. S parameters of the equivalent circuit moldel is compared to those of EM simulation in case of the microstrip line structure.

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Adaptive Learning Circuit For Applying Neural Network (뉴럴 네트워크의 적용을 위한 적응형 학습회로)

  • Lee, Kook-Pyo;Pyo, Chang-Soo;Koh, Si-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.534-540
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    • 2008
  • The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse, are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of neural networks.

A Combined Clock and Data Recovery Circuit with Adaptive Cancellation of Data-Dependent Jitter

  • Lee, Jin-Hee;Kim, Su-Hwan;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.3
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    • pp.193-199
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    • 2008
  • A combined clock and data recovery (CDR) circuit with adaptive cancellation of data-dependent jitter (DDJ) is constructed in all-digital architecture which is amenable to deep submicron technology. The DDJ canceller uses an adaptive FIR filter to compen-sate for any unknown channel characteristic. The proposed CDR decreases jitter in the recovered clock since the DDJ canceller significantly cancels out incoming jitter caused by inter-symbol interference.

A Design of Adaptive Impedance Tuning Circuit for UHF-Band Using λ/4 Transmission Line and π-Network (λ/4 전송 선로와 π-네트워크를 이용한 UHF-대역 적응형 임피던스 정합 회로 설계)

  • Hwang, Soo-Sul;Hong, Sung-Yong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.3
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    • pp.367-376
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    • 2012
  • This paper describes a Adaptive Impedance Tuning Circuit which can be adaptively tuned between circuit's characteristic impedance and the arbitrary load impedance. The Adaptive Impedance Tuning Circuit is consisted of such parts as mismatch sensor, impedance tuner and tuning algorithm. Each parts's design methods proposed in other papers are compared with their advantages and disadvantages. And we propose simple design method for Adaptive Impedance Tuning Circuit using a ${\lambda}/4$ transmission line and ${\pi}$-network. Calculation formulas and selection algorithm from calculated values of a complex load impedance are proposed and simulation using induced calculation formulas and selection algorithm is performed. Simulation results show good agreement with theoretical predictions.

Autonomous Adaptive Digital Over Current Relay (계통변화를 고려한 자율 적응형 과전류 계전기)

  • 윤준석;최면송;이승재;현승호
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.52 no.8
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    • pp.444-449
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    • 2003
  • In this paper present Autonomous Adaptive Digital Over Current Relay for distribution networks which acts autonomous setting using the short circuit impedance measured by relay of power systems. Automation of relay setting is one of the basic requirements for distribution automation, although manual relay setting is used at present. The short circuit impedance from a power source in distribution networks essential for the Autonomous Relay Setting changes frequently in distribution networks. In this paper the short circuit impedance is calculated with voltage and current measured in real time operation of digital relay using the Recursive Least Squares. A new method of digital relay setting is introduced using the the short circuit impedance and load current.

An Improved Distributed Equivalent Circuit Modeling for RF Components by Real-Coefficient AFS Technique

  • Kim, Koon-Tae;Ko, Jae-Hyeong;Paek, Hyun;Kahng, Sung-Tek;Kim, Hyeong-Seok
    • Journal of Electrical Engineering and Technology
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    • v.6 no.3
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    • pp.408-413
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    • 2011
  • In this paper, a real-coefficient approach to Adaptive Frequency Sampling (AFS) technique is developed for efficient equivalent circuit modeling of RF components. This proposed method is advantageous than the vector fitting technique and the conventional AFS method in terms of fewer samples leading to a lower order of a rational function on a given data and to a direct conversion to an equivalent circuit for PSPICE(Personal Simulation Program with Integrated Circuit Emphsis) simulation, respectively. To validate the proposed method, the distributed equivalent circuit of a presented multi-layered RF low-pass filter is obtained using the proposed real-coefficient AFS, and then comparisons with EM simulation and circuit simulation for the device under consideration are achieved.

A light-adaptive CMOS vision chip for edge detection using saturating resistive network (포화 저항망을 이용한 광적응 윤곽 검출용 시각칩)

  • Kong, Jae-Sung;Suh, Sung-Ho;Kim, Jung-Hwan;Shin, Jang-Kyoo;Lee, Min-Ho
    • Journal of Sensor Science and Technology
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    • v.14 no.6
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    • pp.430-437
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    • 2005
  • In this paper, we proposed a biologically inspired light-adaptive edge detection circuit based on the human retina. A saturating resistive network was suggested for light adaptation and simulated by using HSPICE. The light adaptation mechanism of the edge detection circuit was quantitatively analyzed by using a simple model of the saturating resistive element. A light-adaptive capability of the edge detection circuit was confirmed by using the one-dimensional array of the 128 pixels with various levels of input light intensity. Experimental data of the saturating resistive element was compared with the simulated results. The entire capability of the edge detection circuit, implemented with the saturating resistive network, was investigated through the two-dimensional array of the $64{\times}64$ pixels