• 한국경영과학회:학술대회논문집
• /
• 한국경영과학회/대한산업공학회 2003년도 춘계공동학술대회
• /
• pp.217-224
• /
• 2003

ISO 14649 is a new interface (or language) standard for the CAD-CAM -CNC chain, currently under establishment by ISO TC184 SCI and SC4 . Upon completion, it will replace ISO 6983, so called M amp; G codes used for CNC since 1950' s. As the new language is being established, a new CNC controller called STEP-CNC (STEP­compliant CNC), capable of carrying out various intelligent tasks using the new language as an input, receives worldwide attention. In this paper, we present a distributed architecture for STEP-NC system based on the generic paradigm of STEP-NC. The STEP-NC system is consisted of 3 sub-systems: 1) CGS (Code Generation System), 2) CES (Code Edit System), and 3) ACS (Autonomous Control System). Also presented in this paper is algorithm for delta volume decomposition, a crucial algorithm for developing CGS. First method is based on the cutting tool and the second method is based on the turning features commonly used in the shop floor. An illustrative example is given to compare the two methods, and to illustrate usage scenario of the delta volume in the turning STEP- NC system under development.

• 융합신호처리학회 학술대회논문집
• /
• 한국신호처리시스템학회 2005년도 추계학술대회 논문집
• /
• pp.317-320
• /
• 2005

기존의 블라인드 등화(blind equalization) 알고리즘의 step-size는 임의의 값을 알고리즘에 적용하여 수렴속도와 정상 상태의 특성을 고려하여 최적한 step-size를 결정하였다. step-size를 크게 하면 수렴속도는 빠른 반면에 정상 상태에서 에러가 크고, step-size를 작게 하면 수렴속도는 느린 반면에 정상 상태에서 에러가 작아진다. 그렇기 때문에 수렴속도와 정상 상태를 고려해서 step-size를 결정해야 되고, 특별하게 정해지는 기준이 없기 때문에 연구자의 판단에 의해서 다르게 선택된다. 본 논문에서는 등화기 출력의 잔류 심벌간 간섭에 따라 step-size를 가변함으로서 수렴속도 및 정상 상태 성능을 개선한 가변 step-size를 갖는 블라인드 등화 알고리즘을 제안한다.

• 한국CDE학회논문집
• /
• 제12권5호
• /
• pp.366-375
• /
• 2007

Although the STEP modularization is the major development methodology for STEP Application Protocol, there have been few studies on the STEP Modularization in Korea. The necessity of STEP Modularization research has been raised continuously. In addition, the importance became larger and larger because most of newly developing APs, including AP241, are developed using modularization approach. The object of this study is to investigate the basic structure and contents of AEC facilities related Application Modules using STEP Modularization. This study examines 1) the technical analysis regarding STEP Modularization, 2) application modules development regarding civil engineering elements of AP241; Aec_faciliteis_classification", "Aec_civil_item", and "Aec_civil_componet", 3) the developed application modules verification, and 4) the implementation methodology suggestion for application modules and modular AP.

• 정보처리학회논문지:컴퓨터 및 통신 시스템
• /
• 제10권5호
• /
• pp.155-162
• /
• 2021

n-스텝 시간차 학습은 몬테카를로 방법과 1-스텝 시간차 학습을 결합한 것으로, 적절한 n을 선택할 경우 몬테카를로 방법과 1-스텝 시간차 학습보다 성능이 좋은 알고리즘으로 알려져 있지만 최적의 n을 선택하는 것에 어려움이 있다. n-스텝 시간차 학습에서 n값 선택의 어려움을 해소하기 위해, 본 논문에서는 Q의 과대평가가 초기 학습의 성능을 높일 수 있다는 특징과 Q ≈ Q^* 경우, 모든 n-스텝 누적 보상이 비슷한 값을 가진다는 성질을 이용하여 1 ≤ k ≤ n에 대한 모든 k-스텝 누적 보상의 최댓값과 평균으로 구성된 새로운 학습 타겟인 Ω-return을 제안한다. 마지막으로 OpenAI Gym의 Atari 게임 환경에서 n-스텝 시간차 학습과의 성능 비교 평가를 진행하여 본 논문에서 제안하는 알고리즘이 n-스텝 시간차 학습 알고리즘보다 성능이 우수하다는 것을 입증한다.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 1996년도 추계학술대회 논문집
• /
• pp.567-571
• /
• 1996

The objective of STEP is to provide neutral mechanism capable of describing product data through the life cycle of a product, independent form any particular systems. This paper describes an STEP application program that can display the three-dimensional shape based on b-spline surface and the data which defines configuration of the product. The developed program is based on the STEP part 203 “Configuration controlled design”.

• 한국산업융합학회 논문집
• /
• 제7권4호
• /
• pp.377-382
• /
• 2004

This research was about implementing STEP for data exchange among different commercial package(CAD system). STEP was used to share CAD data as follows. ST-Developer implement Solid model was used with a physical file of STEP and represented in a CAD system. And then STEP conversion utility was used to make a neutrality format form in a component modeling. Analysis of Solid model was made possible for CAD system to read in and analyzed Solid model. This research are summarized as follows 1. A basis Model development used Visual C++ for a neutrality data of a programming interface general-use CAD system, and produced Box and Cylinder to a physical file, the result was implemented this in a programming interface to general-use CAD system, it is represented in CAD system as identical one modeling object. 2. STEP was used in different CAD system to utilize to its of each CAD system maximum, CATIA V5R9 user was able to analyze MDT 6 Modeling Arm. 3. STEP was used able to interpret and remodel the existing Solid model.

• 한국인터넷방송통신학회논문지
• /
• 제15권2호
• /
• pp.23-29
• /
• 2015

$a^b{\equiv}c$(mod p)에서 a,c,p가 주어졌을 때 b를 구하는 이산대수 문제를 푸는 아기걸음-거인걸음 알고리즘은 p를 $m={\lceil}{\sqrt{p}}{\rceil}$개의 원소를 가진 m개의 블록으로 분할하고 거인 1명이 보폭 m으로 단방향으로만 $a^0$로 걸어가면서 찾는 방법이다. 본 논문은 기본적으로 p를 p/l, $a^l$ > p로 분할하고, 성인 1명이 보폭 l로 단방향으로 걸어가는 방법으로 변형시켰다. 또한, 성인 $2^k$명이 동시에 걸어가면서 b를 빠르게 찾는 방법으로 확장시켰다. 제안된 알고리즘을 $1{\leq}b{\leq}p-1$의 범위에서 $2^k$, (k=2)를 적용한 결과 기본적인 성인걸음수의 1/4로 감소시키는 효과를 얻었다. 결론적으로, 제안된 알고리즘은 아기걸음-거인걸음 알고리즘의 보폭 수를 획기적으로 단축시킬 수 있었다.

• 전기학회논문지P
• /
• 제63권4호
• /
• pp.361-367
• /
• 2014

This paper is related to a new solar power conditioner for a built-in step-up chopper function. In the first step-up chopper proposed solar PV power conditioner for mutually connected in series with the input voltage of the bypass diodes are respectively connected to the positive terminal should install the mutual boosting chopper diode connected in series with the boost chopper switching element between the two power supply and at the same time the first and the second was connected to a second diode and a resonance inductor and a snubber capacitor in series with each other. And the common connection point between the bypass diode and the step-up chopper and the step-up chopper diode common connection point of the switching elements of the input voltage was set to the boost inductor for storing energy. In addition, between the step-up chopper and the step-up chopper diode and a switching element of a joint connection point of the first auxiliary diode and the second common connection point of the auxiliary diode was provided, the resonance capacitor. Between the step-up chopper and the step-up chopper diode and a switching element of a joint connection point and the common connection point of the resonance inductor snubber capacitor and connecting the third secondary diode, between two power supply lines is characterized by configuring the DC link capacitor bus lines in parallel. Therefore, it is possible to suppress the switching loss through, DC link bus lines, as well as there could seek miniaturization and weight reduction of the power conditioner itself by using a common capacitor of the non-polar non-polar electrolytic capacitor having a capacitor, the service life of the circuit can be extended and it is possible to greatly reduce the loss can be greatly improve the reliability of the product and the operation of the product itself.

• 한국정밀공학회지
• /
• 제12권7호
• /
• pp.26-31
• /
• 1995

A new actuating mechanism suitable for a micro positioning device is developed using piezo-electric elements. The actuator can make a step movement of 0.5 .mu. m up to 3.5 .mu. m. The step size can be adjusted on demand. By repeating this step action, long distance movement is achieved. Precise positioning can be obtained by combining the coarse motion with the maximum step size and fine motion. Two types of fine motion have been proposed for a driving method. Firstly, feedback control bases on PID is applied. The experimental results for the two method are presented.

• Journal of Electrical Engineering and Technology
• /
• 제6권2호
• /
• pp.280-283
• /
• 2011

In the present work, a new approach is proposed for via interconnects of semiconductor devices, where multi-wall carbon nanotubes (MWCNTs) are used instead of conventional metals. In order to implement a selective growth of carbon nanotubes (CNTs) for via interconnect, the buried catalyst method is selected which is the most compatible with semiconductor processes. The cobalt catalyst for CNT growth is pre-deposited before via hole patterning, and to achieve the via etch stop on the thin catalyst layer (ca. 3nm), a novel 2-step etch scheme is designed; the first step is a conventional oxide etch while the second step chemically etches the silicon nitride layer to lower the damage of the catalyst layer. The results show that the 2-step etch scheme is a feasible candidate for the realization of CNT interconnects in conventional semiconductor devices.