• Structural Engineering and Mechanics
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• v.74 no.5
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• pp.611-633
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• 2020

In this paper, a comprehensive review of nanostructures that exhibit piezoelectric behavior on all mechanical, buckling, vibrational, thermal and electrical properties is presented. It is firstly explained vast application of materials with their piezoelectric property and also introduction of other properties. Initially, more application of material which have piezoelectric property is introduced. Zinc oxide (ZnO), boron nitride (BN) and gallium nitride (GaN) respectively, are more application of piezoelectric materials. The nonlocal elasticity theory and piezoelectric constitutive relations are demonstrated to evaluate problems and analyses. Three different approaches consisting of atomistic modeling, continuum modeling and nano-scale continuum modeling in the investigation atomistic simulation of piezoelectric nanostructures are explained. Focusing on piezoelectric behavior, investigation of analyses is performed on fields of surface and small scale effects, buckling, vibration and wave propagation. Different investigations are available in literature focusing on the synthesis, applications and mechanical behaviors of piezoelectric nanostructures. In the study of vibration behavior, researches are studied on fields of linear and nonlinear, longitudinal and transverse, free and forced vibrations. This paper is intended to provide an introduction of the development of the piezoelectric nanostructures. The key issue is a very good understanding of mechanical and electrical behaviors and characteristics of piezoelectric structures to employ in electromechanical systems.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.27.2-27.2
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• 2010

In recent years, there is a strong requirement of low cost, stable microelectro mechanical systems (MEMS) for resonators, microswitches and sensors. Most of these devices consist of freely suspended microcantilevers, which are usually made by the etching of some sacrificial materials. Herein, we have attempted to use Si nanowires, inherited from the parent Si wafer, as a sacrificial material due to its porosity, low cost and ease of fabrication. Prior to the fabrication of the Si nanowires silver nanoparticles were continuously formed on the surface of Si wafer. Vertically aligned Si nanowires were fabricated from the parent Si wafers by aqueous chemical route at $50^{\circ}C$. Afterwards, the morphological and structural characteristics of the Si nanowires were investigated. The morphology of nanowires was strongly modulated by the resistivity of the parent wafer. The 3-step etching of nanowires in diluted KOH solution was carried out at room temperature in order to control the fast etching. A layer of $Si_3N_4$ (300 nm) was used for the selective fabrication of nanowires. Finally, a freely suspended bridge of zinc oxide (ZnO) was fabricated after the removal of nanowires from the parent wafer. At present, we believe that this technique may provide a platform for the inexpensive fabrication of futuristic MEMS.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.323-324
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• 2007

Investigation of improving the properties of UV photodetector which uses the wide bandgap of ZnO are under active progress. In this paper, transparent conducting aluminum-doped Zinc oxide films(AZO) were prepared by rf magnetron sputtering on glass(corning 1737) and p-Si substrate, were then annealed at temperature $400^{\circ}C$ for 2hr. The AZO thin films were deposited by RF sputtering system. HF power and work pressure is 120 W and 15 mTorr, respectively, and the purity of AZO target is 5N. The AZO thin films were deposited at 300, 400, $500^{\circ}C$, and $600^{\circ}C$. For sample deposited at $400^{\circ}C$, we observed best $V_r-I_{ph}$ of 0.94 mA and good transmittance.

• Journal of Ceramic Processing Research
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• v.13 no.spc1
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• pp.140-144
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• 2012

Ga-doped ZnO (GZO) was a limit of application on the photovoltaic devices such as CIGS, CdTe and DSSC requiring high process temperature, because it's electrical resistivity is unstable above 300 ℃ at atmosphere. Therefore, ZTO (zinc tin oxide) was introduced in order to improve permeability and thermal stability of GZO film. The resistivity of GZO (300 nm) single layer increased remarkably from 1.8 × 10-3Ωcm to 5.5 × 10-1Ωcm, when GZO was post-annealed at 400 ℃ in air atmosphere. In the case of the ZTO (150 nm)/GZO (150 nm) double layer, resistivity showed relatively small change from 3.1 × 10-3Ωcm (RT) to 1.2 × 10-2Ωcm (400 ℃), which showed good agreement with change of carrier density. This result means that ZTO upper layer act as a barrier for oxygen at high temperature. Also ZTO (150 nm)/GZO (150 nm) double layer showed lower WVTR compared to GZO (300 nm) single layer. Because ZTO has lower WVTR compared to GZO, ZTO thin film acts as a barrier by preventing oxygen and water molecules to penetrate on top of GZO thin film.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.519-525
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• 2015

Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high $V_{GS}$/low $V_{DS}$ and low $V_{GS}$/high $V_{DS}$ stress conditions through incorporating a forward/reverse $V_{GS}$ sweep and a low/high $V_{DS}$ read-out conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high $V_{GS}$/low $V_{DS}$ stress is applied. On the other hand, when low $V_{GS}$/high $V_{DS}$ stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high $V_{GS}$/low $V_{DS}$ stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low $V_{GS}$/high $V_{DS}$ stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive $V_{GS}/V_{DS}$ stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.59-62
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• 2019

In this study, we have developed solution-processed, F-doped In-Ga-Zn-O semiconductors and investigated their applications to thin-film transistors. In order for forming the appropriate channel layer, precursor solutions were formulated by dissolving the metal salts in the designated solvent and an additive, ammonium fluoride, was incorporated additionally as a chemical modifier. We have studied thermal and chemical contributions by a thermal annealing and an incorporation of chemical modifier, from which it was revealed that electrical performances of the thin-film transistors comprising the channel layer annealed at a low temperature can be improved significantly along with an addition of ammonium fluoride. As a result, when the 20 mol% fluorine was incorporated into the semiconductor layer, electrical characteristics were accomplished with a field-effect mobility of $1.2cm^2/V{\cdot}sec$ and an $I_{on}/_{off}$ of $7{\times}10^6$.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.245-245
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• 2012

차세대 디스플레이로 각광받고 있는 AMOLED에 대한 관심이 높아짐에 따라 구동 소자의 연구가 활발히 이루어지고 있다. 산화물 반도체 박막 트랜지스터는 비정질 실리콘 박막 트랜지스터에 비해 100 $cm^2$/Vs 이하의 높은 이동도와 우수한 전기적 특성으로 AMOLED 구동 소자로서 학계에서 입증되어왔고, 현재 여러 기업에서 산화물 반도체를 이용한 박막 트랜지스터 제작 연구가 활발히 이루어지고 있다. 본 연구는 열처리 조건을 가변하여 제작한 산화물 반도체 박막 트랜지스터의 전기적 특성 분석을 목적으로 한다. 실리콘 기판에 oxidation 공정을 이용하여 SiO2 100 nm, DC스퍼터링을 이용하여 ITZO (Indium-Tin-Zinc Oxide) 산화물 반도체 박막 50 nm, 증착된 산화물 반도체 박막의 열처리 후, evaporation을 이용하여 source/drain 전극 Ag 150 nm 증착하여 박막 트랜지스터를 제작하였다. 12 sccm의 산소유량, 1시간의 열처리 시간에서 열처리 온도 $400^{\circ}C$, $200^{\circ}C$의 샘플은 각각 이동도 $29.52cm^2/V{\cdot}s$, $16.15cm^2/V{\cdot}s$, 문턱전압 2.61 V, 6.14 V, $S{\cdot}S$ 0.37 V/decade, 0.85 V/decade, on-off ratio 5.21 E+07, 1.10 E+07이었다. 30 sccm의 산소유량, 열처리 온도 $200^{\circ}C$에서 열처리 시간 1시간, 1시간 30분 샘플은 각각 이동도 $12.27cm^2/V{\cdot}s$, $10.15cm^2/V{\cdot}s$, 문턱전압 8.07 V, 4.21 V, $S{\cdot}S$ 0.89 V/decade, 0.71 V/decade, on-off ratio 4.31 E+06, 1.05 E+07이었다. 산화물 반도체의 열처리 효과 분석을 통하여 높은 열처리 온도, 적은 산소의 유량, 열처리 시간이 길수록 이동도, 문턱전압, $S{\cdot}S$의 산화물 박막 트랜지스터 소자의 전기적 특성이 개선되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.198-203
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• 2016

We investigate the effects of magnesium (Mg) suppressor layer on the electrical performances and stabilities of amorphous indium-zinc-tin-oxide (a-ITZO) thin-film transistors (TFTs). Compared to the ITZO TFT without a Mg suppressor layer, the ITZO:Mg TFT exhibits slightly smaller field-effect mobility and much reduced subthreshold slope. The ITZO:Mg TFT shows improved electrical stabilities compared to the ITZO TFT under both positive-bias and negative-bias-illumination stresses. From the X-ray photoelectron spectroscopy O1s spectra with fitted curves for ITZO and ITZO:Mg films, we observe that Mg doping contributes to an enhancement of the oxygen bond without oxygen vacancy and a reduction of the oxygen bonds with oxygen vacancies. This result shows that the Mg can be an effective suppressor in a-ITZO TFTs.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.324-326
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• 2016

In this study, we have investigated indium tin zinc oxide (ITZO) as an active channel for non-volatile memory (NVM) devices. The electrical and memory characteristics of NVM devices using multi-stack gate insulator SiO2/SiOx/SiOxNy (OOxOy) with Si-rich SiOx for charge storage layer were also reported. The transmittance of ITZO films reached over 85%. Besides, ITZO-based NVM devices showed good electrical properties such as high field effect mobility of 25.8 cm2/V.s, low threshold voltage of 0.75 V, low subthreshold slope of 0.23 V/dec and high on-off current ratio of $1.25{\times}107$. The transmission Fourier Transform Infrared spectroscopy of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000-2300 cm-1. It indicates that many silicon phases and defect sources exist in the matrix of the SiOx films. In addition, the characteristics of NVM device showed a retention exceeding 97% of threshold voltage shift after 104 s and greater than 94% after 10 years with low operating voltage of +11 V at only 1 ms programming duration time. Therefore, the NVM fabricated by high transparent ITZO active layer and OOxOy memory stack has been applied for the flexible memory system.

• Korean journal of food and cookery science
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• v.20 no.2
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• pp.119-125
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• 2004

Effects of various chemical additives and heat treatments were investigated on the wheat flour doughs and breads. Ammonium ferric citrate, Ca-citrate, CaCl$_2$, FeSO$_4$, MgCl$_2$and ZnO were mixed respectively to the flour up to 0.1% of flour dry weight basis. Ammonium ferric citrate and ferric sulfate showed no significant effects on the dough properties and magnesium sulfate, calcium chloride and zinc oxide increased elastic properties and optimum dough mixing time. However, calcium citrate and magnesium chloride showed no significant effects on the dough mixing properties. Most of chemicals were detrimental on the bread volume except MgSO$_4$ and CaCl$_2$. Breads with MgSO$_4$ and CaCl$_2$ retained the equal or slightly higher volume compared to control bread. Crumb and crust colors of breads with addition of chemicals were changed to lighter than that of control bread. L values both of crumb and crust increased with addition of chemicals except Ca-citrate. To inactivate the endogenous enzymes of flour, flour was roasted under electric oven, exposed to UV and microwave. Those heat treatments of flour increased dough stability and produced no dough breakdown after optimum mixing time. However, bread volume of heat-treated flour decreased.